[PATCH] D132384: [AArch64][PAC] Select MOVK for ptrauth.blend intrinsic.

[Kristof Beyls via Phabricator via llvm-commits]

kristof.beyls added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/ptrauth-intrinsic-blend.ll:19
+; CHECK-NEXT:    ret
+  %tmp = call i64 @llvm.ptrauth.blend(i64 %arg, i64 12345)
+  ret i64 %tmp
----------------
Overall, I think this patch looks fine.
I notice that the definition of the llvm.ptrauth.blend intrinisic is (per https://llvm.org/docs/PointerAuth.html#llvm-ptrauth-blend):

> The integer discriminator argument is a small integer, as specified by the target.
and the signature of the llvm.ptrauth.blend is documented as:
```
declare i64 @llvm.ptrauth.blend(i64 <address discriminator>, i64 <integer discriminator>)
```

It makes me wonder what should happen when an immediate too large to fit into an i16 is passed....
I'm guessing with the patch as currently written, it would result in the backend failing to do instruction selection?
Or rather DAGISel failing to do instruction selection and GlobalISel succeeding, taking the lower 16 bits of the immediate?

I wonder if for consistency reasons it would be easily possible to make DAGISel behave like GlobalISel and accept immediates larger than 16 bits, and take the lower 16 bit value?
That would be behavior that presumably is consistent also with when the blend value comes from a register rather than an immediate?




Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D132384/new/

https://reviews.llvm.org/D132384