[PATCH] D131959: [AMDGPU] Fix SDST operand of V_DIV_SCALE to always be VCC

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added a comment.

Adding `isAsmParserOnly` solves it, but now it's InstrInfo that fails:

  [build] error: Multiple matches found for `V_DIV_SCALE_F32_e64', for the relation `getMCOpcodeGen', row fields ["v_div_scale_f32_e64"], column `["0"]'
  [build] CurInstr: V_DIV_SCALE_F32_w64_gfx6_gfx7
  [build] MatchInstr: V_DIV_SCALE_F32_w32_gfx6_gfx7

I'm going to update the diff with my latest (non-working) draft. It's a bit messy so I'll look into cleaning it up further.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131959/new/

https://reviews.llvm.org/D131959