[PATCH] D57367: [DAGCombine] Do several rounds of combine for nodes using SimplifyDemandedBits.
Paweł Bylica via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 23 00:33:24 PDT 2022
chfast added inline comments.
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Comment at: test/CodeGen/X86/shift-double.ll:294
-; X86-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-NEXT: shldl %cl, %edx, %eax
; X86-NEXT: retl
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Is not creating shld the expected result?
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Comment at: test/CodeGen/X86/vector-truncate-combine.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-- -O2 -start-after=stack-protector -stop-before=loops %s -o - | FileCheck %s
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No changes in this file.
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D57367/new/
https://reviews.llvm.org/D57367
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