[llvm] 6b3cbf6 - [InstCombine] add tests for shuf bitcast. nfc
Chenbing Zheng via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 22 20:15:05 PDT 2022
Author: Chenbing Zheng
Date: 2022-08-23T11:01:18+08:00
New Revision: 6b3cbf60f4f737baa3891fc750751b377076b518
URL: https://github.com/llvm/llvm-project/commit/6b3cbf60f4f737baa3891fc750751b377076b518
DIFF: https://github.com/llvm/llvm-project/commit/6b3cbf60f4f737baa3891fc750751b377076b518.diff
LOG: [InstCombine] add tests for shuf bitcast. nfc
Added:
Modified:
llvm/test/Transforms/InstCombine/bitreverse.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/bitreverse.ll b/llvm/test/Transforms/InstCombine/bitreverse.ll
index 6bc0431c48646..dd3d48fd9abf6 100644
--- a/llvm/test/Transforms/InstCombine/bitreverse.ll
+++ b/llvm/test/Transforms/InstCombine/bitreverse.ll
@@ -252,3 +252,68 @@ define i8 @rev8_mul_and_lshr(i8 %0) {
%10 = trunc i64 %9 to i8
ret i8 %10
}
+
+define i4 @shuf_4bits(<4 x i1> %x) {
+; CHECK-LABEL: @shuf_4bits(
+; CHECK-NEXT: [[BITREVERSE:%.*]] = shufflevector <4 x i1> [[X:%.*]], <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i1> [[BITREVERSE]] to i4
+; CHECK-NEXT: ret i4 [[CAST]]
+;
+ %bitreverse = shufflevector <4 x i1> %x, <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+ %cast = bitcast <4 x i1> %bitreverse to i4
+ ret i4 %cast
+}
+
+define i4 @shuf_load_4bits(<4 x i1> * %p) {
+; CHECK-LABEL: @shuf_load_4bits(
+; CHECK-NEXT: [[X:%.*]] = load <4 x i1>, <4 x i1>* [[P:%.*]], align 1
+; CHECK-NEXT: [[BITREVERSE:%.*]] = shufflevector <4 x i1> [[X]], <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i1> [[BITREVERSE]] to i4
+; CHECK-NEXT: ret i4 [[CAST]]
+;
+ %x = load <4 x i1>, <4 x i1>* %p
+ %bitreverse = shufflevector <4 x i1> %x, <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+ %cast = bitcast <4 x i1> %bitreverse to i4
+ ret i4 %cast
+}
+
+define i4 @shuf_bitcast_twice_4bits(i4 %x) {
+; CHECK-LABEL: @shuf_bitcast_twice_4bits(
+; CHECK-NEXT: [[CAST1:%.*]] = bitcast i4 [[X:%.*]] to <4 x i1>
+; CHECK-NEXT: [[BITREVERSE:%.*]] = shufflevector <4 x i1> [[CAST1]], <4 x i1> undef, <4 x i32> <i32 undef, i32 2, i32 1, i32 0>
+; CHECK-NEXT: [[CAST2:%.*]] = bitcast <4 x i1> [[BITREVERSE]] to i4
+; CHECK-NEXT: ret i4 [[CAST2]]
+;
+ %cast1 = bitcast i4 %x to <4 x i1>
+ %bitreverse = shufflevector <4 x i1> %cast1, <4 x i1> undef, <4 x i32> <i32 undef, i32 2, i32 1, i32 0>
+ %cast2 = bitcast <4 x i1> %bitreverse to i4
+ ret i4 %cast2
+}
+
+; Negtive tests - not reverse
+define i4 @shuf_4bits_not_reverse(<4 x i1> %x) {
+; CHECK-LABEL: @shuf_4bits_not_reverse(
+; CHECK-NEXT: [[BITREVERSE:%.*]] = shufflevector <4 x i1> [[X:%.*]], <4 x i1> undef, <4 x i32> <i32 3, i32 1, i32 2, i32 0>
+; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i1> [[BITREVERSE]] to i4
+; CHECK-NEXT: ret i4 [[CAST]]
+;
+ %bitreverse = shufflevector <4 x i1> %x, <4 x i1> undef, <4 x i32> <i32 3, i32 1, i32 2, i32 0>
+ %cast = bitcast <4 x i1> %bitreverse to i4
+ ret i4 %cast
+}
+
+; Negative test - extra use
+declare void @use(<4 x i1>)
+
+define i4 @shuf_4bits_extra_use(<4 x i1> %x) {
+; CHECK-LABEL: @shuf_4bits_extra_use(
+; CHECK-NEXT: [[BITREVERSE:%.*]] = shufflevector <4 x i1> [[X:%.*]], <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+; CHECK-NEXT: call void @use(<4 x i1> [[BITREVERSE]])
+; CHECK-NEXT: [[CAST:%.*]] = bitcast <4 x i1> [[BITREVERSE]] to i4
+; CHECK-NEXT: ret i4 [[CAST]]
+;
+ %bitreverse = shufflevector <4 x i1> %x, <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
+ call void @use(<4 x i1> %bitreverse)
+ %cast = bitcast <4 x i1> %bitreverse to i4
+ ret i4 %cast
+}
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