[PATCH] D130784: [AMDGPU] Support LDS spilling

[Sebastian Neubauer via Phabricator via llvm-commits]

sebastian-ne added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:824-830
+  void setWorkgroupInfoReg(Register Reg) {
+    assert(Reg != 0);
+    WorkgroupInfoReg = Reg;
+  }
+
+  Register getWorkgroupInfoReg() const { return WorkgroupInfoReg; }
+
----------------
Maybe this should be below `getStackPtrOffsetReg`? Currently, it divides `setStackPtrOffsetReg` and `getStackPtrOffsetReg`.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:1295
+            LdsSpillInfo.M0SaveRestoreReg)
+        .addReg(AMDGPU::M0);
+    if (LdsSpillInfo.M0InitVal == AMDGPU::NoRegister)
----------------
I guess M0 could have a kill flag here?


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2195
+        if (ldsSpill) {
+          MFI->addToSpilledVGPRs(getNumSubRegsForSpillOp(MI->getOpcode()));
+          MI->eraseFromParent();
----------------
The non-lds restore code does not call `addToSpilledVGPRs`. Is this intentional here?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130784/new/

https://reviews.llvm.org/D130784