[PATCH] D121779: [RISCV] Add zihintntl compressed instructions

[Cao Shun via Phabricator via llvm-commits]

alextsao1999 updated this revision to Diff 454433.
alextsao1999 added a comment.

Fix check no c


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D121779/new/

https://reviews.llvm.org/D121779

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoC.td
  llvm/test/MC/RISCV/attribute-arch.s
  llvm/test/MC/RISCV/rv32zihintntl-invalid.s
  llvm/test/MC/RISCV/rv32zihintntlc-invalid.s
  llvm/test/MC/RISCV/rv32zihintntlc-valid.s

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