[llvm] a6c3ccd - [RISCV] Be more strict about LUI+ADDI macrofusion pre-RA.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-08-21T10:58:15-07:00
New Revision: a6c3ccd476d43305fc91f56c8066f913110ce078

URL: https://github.com/llvm/llvm-project/commit/a6c3ccd476d43305fc91f56c8066f913110ce078
DIFF: https://github.com/llvm/llvm-project/commit/a6c3ccd476d43305fc91f56c8066f913110ce078.diff

LOG: [RISCV] Be more strict about LUI+ADDI macrofusion pre-RA.

Don't macrofuse if the LUI has more than 1 user. That will likely
require the LUI to have a different destination register post-RA.
LUI+ADDI can only be fused if they write the same register.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVMacroFusion.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp b/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
index 3b9177bc1635b..232f202f18159 100644
--- a/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
+++ b/llvm/lib/Target/RISCV/RISCVMacroFusion.cpp
@@ -45,9 +45,15 @@ static bool isLUIADDI(const MachineInstr *FirstMI,
   if (SecondMI.getOperand(1).getReg() != FirstDest)
     return false;
 
+  // If the input is virtual make sure this is the only user.
+  if (FirstDest.isVirtual()) {
+    auto &MRI = SecondMI.getMF()->getRegInfo();
+    return MRI.hasOneNonDBGUse(FirstDest);
+  }
+
   // If the FirstMI destination is non-virtual, it should match the SecondMI
   // destination.
-  return FirstDest.isVirtual() || SecondMI.getOperand(0).getReg() == FirstDest;
+  return SecondMI.getOperand(0).getReg() == FirstDest;
 }
 
 static bool shouldScheduleAdjacent(const TargetInstrInfo &TII,