[llvm] 59960e8 - [RISCV] Factor out getVectorImmCost cost after 0e7ed3 [nfc]

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2022-08-19T12:53:54-07:00
New Revision: 59960e8db9cf53ef6be7a1f4015be227aff34e3f

URL: https://github.com/llvm/llvm-project/commit/59960e8db9cf53ef6be7a1f4015be227aff34e3f
DIFF: https://github.com/llvm/llvm-project/commit/59960e8db9cf53ef6be7a1f4015be227aff34e3f.diff

LOG: [RISCV] Factor out getVectorImmCost cost after 0e7ed3 [nfc]

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
index 3a5570c8858d..80c735dd1771 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
@@ -512,6 +512,21 @@ InstructionCost RISCVTTIImpl::getExtendedReductionCost(
          getArithmeticReductionCost(Opcode, ValTy, FMF, CostKind);
 }
 
+InstructionCost RISCVTTIImpl::getVectorImmCost(VectorType *VecTy,
+                                               TTI::OperandValueKind OpInfo,
+                                               TTI::OperandValueProperties PropInfo,
+                                               TTI::TargetCostKind CostKind) {
+  assert((OpInfo == TTI::OK_UniformConstantValue ||
+          OpInfo == TTI::OK_NonUniformConstantValue) && "non constant operand?");
+  APInt PseudoAddr = APInt::getAllOnes(DL.getPointerSizeInBits());
+  // Add a cost of address load + the cost of the vector load.
+  return RISCVMatInt::getIntMatCost(PseudoAddr, DL.getPointerSizeInBits(),
+                                    getST()->getFeatureBits()) +
+    getMemoryOpCost(Instruction::Load, VecTy, DL.getABITypeAlign(VecTy),
+                    /*AddressSpace=*/0, CostKind);
+}
+
+
 InstructionCost RISCVTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
                                               MaybeAlign Alignment,
                                               unsigned AddressSpace,
@@ -522,12 +537,7 @@ InstructionCost RISCVTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src,
   if (Opcode == Instruction::Store && isa<VectorType>(Src) &&
       (OpdInfo == TTI::OK_UniformConstantValue ||
        OpdInfo == TTI::OK_NonUniformConstantValue)) {
-    APInt PseudoAddr = APInt::getAllOnes(DL.getPointerSizeInBits());
-    // Add a cost of address load + the cost of the vector load.
-    Cost += RISCVMatInt::getIntMatCost(PseudoAddr, DL.getPointerSizeInBits(),
-                                       getST()->getFeatureBits()) +
-            getMemoryOpCost(Instruction::Load, Src, DL.getABITypeAlign(Src),
-                            /*AddressSpace=*/0, CostKind);
+    Cost += getVectorImmCost(cast<VectorType>(Src), OpdInfo, TTI::OP_None, CostKind);
   }
   return Cost + BaseT::getMemoryOpCost(Opcode, Src, Alignment, AddressSpace,
                                        CostKind, OpdInfo, I);

diff  --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
index b9b07f1c7b85..aa39f635e508 100644
--- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
@@ -51,6 +51,13 @@ class RISCVTTIImpl : public BasicTTIImplBase<RISCVTTIImpl> {
       : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
         TLI(ST->getTargetLowering()) {}
 
+  /// Return the cost of materializing a vector immediate, assuming it does
+  /// not get folded into the using instruction(s).
+  InstructionCost getVectorImmCost(VectorType *VecTy,
+                                   TTI::OperandValueKind OpInfo,
+                                   TTI::OperandValueProperties PropInfo,
+                                   TTI::TargetCostKind CostKind);
+
   InstructionCost getIntImmCost(const APInt &Imm, Type *Ty,
                                 TTI::TargetCostKind CostKind);
   InstructionCost getIntImmCostInst(unsigned Opcode, unsigned Idx,