[llvm] ba1f4ca - [RISCV] Copy SDNodeFlags in lowerToScalableOp.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-08-18T20:42:59-07:00
New Revision: ba1f4cab44513d8407ee8b308e49a94172be26cd

URL: https://github.com/llvm/llvm-project/commit/ba1f4cab44513d8407ee8b308e49a94172be26cd
DIFF: https://github.com/llvm/llvm-project/commit/ba1f4cab44513d8407ee8b308e49a94172be26cd.diff

LOG: [RISCV] Copy SDNodeFlags in lowerToScalableOp.

Reviewed By: arcbbb

Differential Revision: https://reviews.llvm.org/D132177

Added: 
    llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmf.ll

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index 5d0fb6d0cf4cf..063846792e7d1 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -6262,7 +6262,8 @@ SDValue RISCVTargetLowering::lowerToScalableOp(SDValue Op, SelectionDAG &DAG,
     Ops.push_back(Mask);
   Ops.push_back(VL);
 
-  SDValue ScalableRes = DAG.getNode(NewOpc, DL, ContainerVT, Ops);
+  SDValue ScalableRes =
+      DAG.getNode(NewOpc, DL, ContainerVT, Ops, Op->getFlags());
   return convertFromScalableVector(VT, ScalableRes, DAG, Subtarget);
 }
 

diff  --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmf.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmf.ll
new file mode 100644
index 0000000000000..77b73fe629389
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmf.ll
@@ -0,0 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+; RUN: llc < %s -mtriple=riscv64 -mattr=+v -riscv-v-vector-bits-min=-1 -stop-after=finalize-isel | FileCheck %s
+
+
+define <2 x double> @foo(<2 x double> %x, <2 x double> %y) {
+  ; CHECK-LABEL: name: foo
+  ; CHECK: bb.0 (%ir-block.0):
+  ; CHECK-NEXT:   liveins: $v8, $v9
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:vr = COPY $v9
+  ; CHECK-NEXT:   [[COPY1:%[0-9]+]]:vr = COPY $v8
+  ; CHECK-NEXT:   %2:vr = nnan ninf nsz arcp contract afn reassoc nofpexcept PseudoVFADD_VV_M1 [[COPY1]], [[COPY]], 2, 6 /* e64 */, implicit $frm
+  ; CHECK-NEXT:   $v8 = COPY %2
+  ; CHECK-NEXT:   PseudoRET implicit $v8
+  %1 = fadd fast <2 x double> %x, %y
+  ret <2 x double> %1
+}