[llvm] bce94ea - [OMPIRBuilder] Add support for safelen clause
Prabhdeep Singh Soni via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 18 12:44:44 PDT 2022
Author: Prabhdeep Singh Soni
Date: 2022-08-18T15:43:08-04:00
New Revision: bce94ea551ae775805824d62944aa585c4f831b6
URL: https://github.com/llvm/llvm-project/commit/bce94ea551ae775805824d62944aa585c4f831b6
DIFF: https://github.com/llvm/llvm-project/commit/bce94ea551ae775805824d62944aa585c4f831b6.diff
LOG: [OMPIRBuilder] Add support for safelen clause
This patch adds OMPIRBuilder support for the safelen clause for the
simd directive.
Reviewed By: shraiysh, Meinersbur
Differential Revision: https://reviews.llvm.org/D131526
Added:
clang/test/OpenMP/irbuilder_safelen.cpp
clang/test/OpenMP/irbuilder_simdlen_safelen.cpp
Modified:
clang/lib/CodeGen/CGStmtOpenMP.cpp
llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Removed:
################################################################################
diff --git a/clang/lib/CodeGen/CGStmtOpenMP.cpp b/clang/lib/CodeGen/CGStmtOpenMP.cpp
index 5219b6e39f4e2..7398ea98e61b0 100644
--- a/clang/lib/CodeGen/CGStmtOpenMP.cpp
+++ b/clang/lib/CodeGen/CGStmtOpenMP.cpp
@@ -2595,8 +2595,8 @@ static void emitOMPSimdRegion(CodeGenFunction &CGF, const OMPLoopDirective &S,
static bool isSupportedByOpenMPIRBuilder(const OMPSimdDirective &S) {
// Check for unsupported clauses
for (OMPClause *C : S.clauses()) {
- // Currently only simdlen clause is supported
- if (!isa<OMPSimdlenClause>(C))
+ // Currently only simdlen and safelen clauses are supported
+ if (!(isa<OMPSimdlenClause>(C) || isa<OMPSafelenClause>(C)))
return false;
}
@@ -2647,9 +2647,17 @@ void CodeGenFunction::EmitOMPSimdDirective(const OMPSimdDirective &S) {
auto *Val = cast<llvm::ConstantInt>(Len.getScalarVal());
Simdlen = Val;
}
+ llvm::ConstantInt *Safelen = nullptr;
+ if (const auto *C = S.getSingleClause<OMPSafelenClause>()) {
+ RValue Len =
+ this->EmitAnyExpr(C->getSafelen(), AggValueSlot::ignored(),
+ /*ignoreResult=*/true);
+ auto *Val = cast<llvm::ConstantInt>(Len.getScalarVal());
+ Safelen = Val;
+ }
// Add simd metadata to the collapsed loop. Do not generate
// another loop for if clause. Support for if clause is done earlier.
- OMPBuilder.applySimd(CLI, /*IfCond*/ nullptr, Simdlen);
+ OMPBuilder.applySimd(CLI, /*IfCond*/ nullptr, Simdlen, Safelen);
return;
}
};
diff --git a/clang/test/OpenMP/irbuilder_safelen.cpp b/clang/test/OpenMP/irbuilder_safelen.cpp
new file mode 100644
index 0000000000000..647b0b425f46e
--- /dev/null
+++ b/clang/test/OpenMP/irbuilder_safelen.cpp
@@ -0,0 +1,137 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals
+// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-enable-irbuilder -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// expected-no-diagnostics
+
+struct S {
+ int a, b;
+};
+
+struct P {
+ int a, b;
+};
+
+// CHECK-LABEL: @_Z6simplePfS_Pi(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8
+// CHECK-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8
+// CHECK-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8
+// CHECK-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
+// CHECK-NEXT: [[P:%.*]] = alloca %struct.S*, align 8
+// CHECK-NEXT: [[PP:%.*]] = alloca [[STRUCT_P:%.*]], align 4
+// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
+// CHECK-NEXT: [[AGG_CAPTURED1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4
+// CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[J:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[AGG_CAPTURED8:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8
+// CHECK-NEXT: [[AGG_CAPTURED9:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 4
+// CHECK-NEXT: [[DOTCOUNT_ADDR10:%.*]] = alloca i32, align 4
+// CHECK-NEXT: store float* [[A:%.*]], float** [[A_ADDR]], align 8
+// CHECK-NEXT: store float* [[B:%.*]], float** [[B_ADDR]], align 8
+// CHECK-NEXT: store i32* [[C:%.*]], i32** [[C_ADDR]], align 8
+// CHECK-NEXT: store i32 3, i32* [[I]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
+// CHECK-NEXT: store i32* [[I]], i32** [[TMP0]], align 8
+// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[AGG_CAPTURED1]], i32 0, i32 0
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4
+// CHECK-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4
+// CHECK-NEXT: call void @__captured_stmt(i32* [[DOTCOUNT_ADDR]], %struct.anon* [[AGG_CAPTURED]])
+// CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, i32* [[DOTCOUNT_ADDR]], align 4
+// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]]
+// CHECK: omp_loop.preheader:
+// CHECK-NEXT: br label [[OMP_LOOP_HEADER:%.*]]
+// CHECK: omp_loop.header:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER]] ], [ [[OMP_LOOP_NEXT:%.*]], [[OMP_LOOP_INC:%.*]] ]
+// CHECK-NEXT: br label [[OMP_LOOP_COND:%.*]]
+// CHECK: omp_loop.cond:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[DOTCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label [[OMP_LOOP_BODY:%.*]], label [[OMP_LOOP_EXIT:%.*]]
+// CHECK: omp_loop.body:
+// CHECK-NEXT: call void @__captured_stmt.1(i32* [[I]], i32 [[OMP_LOOP_IV]], %struct.anon.0* [[AGG_CAPTURED1]])
+// CHECK-NEXT: [[TMP3:%.*]] = load float*, float** [[B_ADDR]], align 8
+// CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4
+// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
+// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[TMP3]], i64 [[IDXPROM]]
+// CHECK-NEXT: [[TMP5:%.*]] = load float, float* [[ARRAYIDX]], align 4
+// CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i32 0, i32 0
+// CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[A2]], align 4
+// CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP6]] to float
+// CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP5]], [[CONV]]
+// CHECK-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[P]], align 8
+// CHECK-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP7]], i32 0, i32 0
+// CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[A3]], align 4
+// CHECK-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP8]] to float
+// CHECK-NEXT: [[ADD5:%.*]] = fadd float [[ADD]], [[CONV4]]
+// CHECK-NEXT: [[TMP9:%.*]] = load float*, float** [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4
+// CHECK-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP10]] to i64
+// CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, float* [[TMP9]], i64 [[IDXPROM6]]
+// CHECK-NEXT: store float [[ADD5]], float* [[ARRAYIDX7]], align 4
+// CHECK-NEXT: br label [[OMP_LOOP_INC]]
+// CHECK: omp_loop.inc:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label [[OMP_LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]
+// CHECK: omp_loop.exit:
+// CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]]
+// CHECK: omp_loop.after:
+// CHECK-NEXT: store i32 3, i32* [[J]], align 4
+// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[AGG_CAPTURED8]], i32 0, i32 0
+// CHECK-NEXT: store i32* [[J]], i32** [[TMP11]], align 8
+// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED9]], i32 0, i32 0
+// CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[J]], align 4
+// CHECK-NEXT: store i32 [[TMP13]], i32* [[TMP12]], align 4
+// CHECK-NEXT: call void @__captured_stmt.2(i32* [[DOTCOUNT_ADDR10]], %struct.anon.1* [[AGG_CAPTURED8]])
+// CHECK-NEXT: [[DOTCOUNT11:%.*]] = load i32, i32* [[DOTCOUNT_ADDR10]], align 4
+// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER12:%.*]]
+// CHECK: omp_loop.preheader12:
+// CHECK-NEXT: br label [[OMP_LOOP_HEADER13:%.*]]
+// CHECK: omp_loop.header13:
+// CHECK-NEXT: [[OMP_LOOP_IV19:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER12]] ], [ [[OMP_LOOP_NEXT21:%.*]], [[OMP_LOOP_INC16:%.*]] ]
+// CHECK-NEXT: br label [[OMP_LOOP_COND14:%.*]]
+// CHECK: omp_loop.cond14:
+// CHECK-NEXT: [[OMP_LOOP_CMP20:%.*]] = icmp ult i32 [[OMP_LOOP_IV19]], [[DOTCOUNT11]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP20]], label [[OMP_LOOP_BODY15:%.*]], label [[OMP_LOOP_EXIT17:%.*]]
+// CHECK: omp_loop.body15:
+// CHECK-NEXT: call void @__captured_stmt.3(i32* [[J]], i32 [[OMP_LOOP_IV19]], %struct.anon.2* [[AGG_CAPTURED9]]), !llvm.access.group [[ACC_GRP6:![0-9]+]]
+// CHECK-NEXT: [[A22:%.*]] = getelementptr inbounds [[STRUCT_P]], %struct.P* [[PP]], i32 0, i32 0
+// CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[A22]], align 4, !llvm.access.group [[ACC_GRP6]]
+// CHECK-NEXT: [[TMP15:%.*]] = load i32*, i32** [[C_ADDR]], align 8, !llvm.access.group [[ACC_GRP6]]
+// CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group [[ACC_GRP6]]
+// CHECK-NEXT: [[IDXPROM23:%.*]] = sext i32 [[TMP16]] to i64
+// CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i32, i32* [[TMP15]], i64 [[IDXPROM23]]
+// CHECK-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX24]], align 4, !llvm.access.group [[ACC_GRP6]]
+// CHECK-NEXT: br label [[OMP_LOOP_INC16]]
+// CHECK: omp_loop.inc16:
+// CHECK-NEXT: [[OMP_LOOP_NEXT21]] = add nuw i32 [[OMP_LOOP_IV19]], 1
+// CHECK-NEXT: br label [[OMP_LOOP_HEADER13]], !llvm.loop [[LOOP7:![0-9]+]]
+// CHECK: omp_loop.exit17:
+// CHECK-NEXT: br label [[OMP_LOOP_AFTER18:%.*]]
+// CHECK: omp_loop.after18:
+// CHECK-NEXT: ret void
+//
+void simple(float *a, float *b, int *c) {
+ S s, *p;
+ P pp;
+#pragma omp simd safelen(3)
+ for (int i = 3; i < 32; i += 5) {
+ a[i] = b[i] + s.a + p->a;
+ }
+
+#pragma omp simd
+ for (int j = 3; j < 32; j += 5) {
+ c[j] = pp.a;
+ }
+}
+//.
+// CHECK: attributes #0 = { mustprogress noinline nounwind optnone "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+mmx,+sse,+sse2,+x87" }
+// CHECK: attributes #1 = { noinline nounwind optnone "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+mmx,+sse,+sse2,+x87" }
+//.
+// CHECK: !0 = !{i32 1, !"wchar_size", i32 4}
+// CHECK: !1 = !{i32 7, !"openmp", i32 45}
+// CHECK: !3 = distinct !{!3, !4, !5}
+// CHECK: !4 = !{!"llvm.loop.vectorize.enable", i1 true}
+// CHECK: !5 = !{!"llvm.loop.vectorize.width", i32 3}
+// CHECK: !6 = distinct !{}
+// CHECK: !7 = distinct !{!7, !8, !4}
+// CHECK: !8 = !{!"llvm.loop.parallel_accesses", !6}
+//.
diff --git a/clang/test/OpenMP/irbuilder_simdlen_safelen.cpp b/clang/test/OpenMP/irbuilder_simdlen_safelen.cpp
new file mode 100644
index 0000000000000..5c18324ba0953
--- /dev/null
+++ b/clang/test/OpenMP/irbuilder_simdlen_safelen.cpp
@@ -0,0 +1,137 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals
+// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-enable-irbuilder -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// expected-no-diagnostics
+
+struct S {
+ int a, b;
+};
+
+struct P {
+ int a, b;
+};
+
+// CHECK-LABEL: @_Z6simplePfS_Pi(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: [[A_ADDR:%.*]] = alloca float*, align 8
+// CHECK-NEXT: [[B_ADDR:%.*]] = alloca float*, align 8
+// CHECK-NEXT: [[C_ADDR:%.*]] = alloca i32*, align 8
+// CHECK-NEXT: [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 4
+// CHECK-NEXT: [[P:%.*]] = alloca %struct.S*, align 8
+// CHECK-NEXT: [[PP:%.*]] = alloca [[STRUCT_P:%.*]], align 4
+// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
+// CHECK-NEXT: [[AGG_CAPTURED1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4
+// CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[J:%.*]] = alloca i32, align 4
+// CHECK-NEXT: [[AGG_CAPTURED8:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8
+// CHECK-NEXT: [[AGG_CAPTURED9:%.*]] = alloca [[STRUCT_ANON_2:%.*]], align 4
+// CHECK-NEXT: [[DOTCOUNT_ADDR10:%.*]] = alloca i32, align 4
+// CHECK-NEXT: store float* [[A:%.*]], float** [[A_ADDR]], align 8
+// CHECK-NEXT: store float* [[B:%.*]], float** [[B_ADDR]], align 8
+// CHECK-NEXT: store i32* [[C:%.*]], i32** [[C_ADDR]], align 8
+// CHECK-NEXT: store i32 3, i32* [[I]], align 4
+// CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], %struct.anon* [[AGG_CAPTURED]], i32 0, i32 0
+// CHECK-NEXT: store i32* [[I]], i32** [[TMP0]], align 8
+// CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], %struct.anon.0* [[AGG_CAPTURED1]], i32 0, i32 0
+// CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4
+// CHECK-NEXT: store i32 [[TMP2]], i32* [[TMP1]], align 4
+// CHECK-NEXT: call void @__captured_stmt(i32* [[DOTCOUNT_ADDR]], %struct.anon* [[AGG_CAPTURED]])
+// CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, i32* [[DOTCOUNT_ADDR]], align 4
+// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]]
+// CHECK: omp_loop.preheader:
+// CHECK-NEXT: br label [[OMP_LOOP_HEADER:%.*]]
+// CHECK: omp_loop.header:
+// CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER]] ], [ [[OMP_LOOP_NEXT:%.*]], [[OMP_LOOP_INC:%.*]] ]
+// CHECK-NEXT: br label [[OMP_LOOP_COND:%.*]]
+// CHECK: omp_loop.cond:
+// CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[DOTCOUNT]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label [[OMP_LOOP_BODY:%.*]], label [[OMP_LOOP_EXIT:%.*]]
+// CHECK: omp_loop.body:
+// CHECK-NEXT: call void @__captured_stmt.1(i32* [[I]], i32 [[OMP_LOOP_IV]], %struct.anon.0* [[AGG_CAPTURED1]])
+// CHECK-NEXT: [[TMP3:%.*]] = load float*, float** [[B_ADDR]], align 8
+// CHECK-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4
+// CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
+// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, float* [[TMP3]], i64 [[IDXPROM]]
+// CHECK-NEXT: [[TMP5:%.*]] = load float, float* [[ARRAYIDX]], align 4
+// CHECK-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[S]], i32 0, i32 0
+// CHECK-NEXT: [[TMP6:%.*]] = load i32, i32* [[A2]], align 4
+// CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP6]] to float
+// CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP5]], [[CONV]]
+// CHECK-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[P]], align 8
+// CHECK-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[TMP7]], i32 0, i32 0
+// CHECK-NEXT: [[TMP8:%.*]] = load i32, i32* [[A3]], align 4
+// CHECK-NEXT: [[CONV4:%.*]] = sitofp i32 [[TMP8]] to float
+// CHECK-NEXT: [[ADD5:%.*]] = fadd float [[ADD]], [[CONV4]]
+// CHECK-NEXT: [[TMP9:%.*]] = load float*, float** [[A_ADDR]], align 8
+// CHECK-NEXT: [[TMP10:%.*]] = load i32, i32* [[I]], align 4
+// CHECK-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP10]] to i64
+// CHECK-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, float* [[TMP9]], i64 [[IDXPROM6]]
+// CHECK-NEXT: store float [[ADD5]], float* [[ARRAYIDX7]], align 4
+// CHECK-NEXT: br label [[OMP_LOOP_INC]]
+// CHECK: omp_loop.inc:
+// CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1
+// CHECK-NEXT: br label [[OMP_LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]
+// CHECK: omp_loop.exit:
+// CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]]
+// CHECK: omp_loop.after:
+// CHECK-NEXT: store i32 3, i32* [[J]], align 4
+// CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], %struct.anon.1* [[AGG_CAPTURED8]], i32 0, i32 0
+// CHECK-NEXT: store i32* [[J]], i32** [[TMP11]], align 8
+// CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_ANON_2]], %struct.anon.2* [[AGG_CAPTURED9]], i32 0, i32 0
+// CHECK-NEXT: [[TMP13:%.*]] = load i32, i32* [[J]], align 4
+// CHECK-NEXT: store i32 [[TMP13]], i32* [[TMP12]], align 4
+// CHECK-NEXT: call void @__captured_stmt.2(i32* [[DOTCOUNT_ADDR10]], %struct.anon.1* [[AGG_CAPTURED8]])
+// CHECK-NEXT: [[DOTCOUNT11:%.*]] = load i32, i32* [[DOTCOUNT_ADDR10]], align 4
+// CHECK-NEXT: br label [[OMP_LOOP_PREHEADER12:%.*]]
+// CHECK: omp_loop.preheader12:
+// CHECK-NEXT: br label [[OMP_LOOP_HEADER13:%.*]]
+// CHECK: omp_loop.header13:
+// CHECK-NEXT: [[OMP_LOOP_IV19:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER12]] ], [ [[OMP_LOOP_NEXT21:%.*]], [[OMP_LOOP_INC16:%.*]] ]
+// CHECK-NEXT: br label [[OMP_LOOP_COND14:%.*]]
+// CHECK: omp_loop.cond14:
+// CHECK-NEXT: [[OMP_LOOP_CMP20:%.*]] = icmp ult i32 [[OMP_LOOP_IV19]], [[DOTCOUNT11]]
+// CHECK-NEXT: br i1 [[OMP_LOOP_CMP20]], label [[OMP_LOOP_BODY15:%.*]], label [[OMP_LOOP_EXIT17:%.*]]
+// CHECK: omp_loop.body15:
+// CHECK-NEXT: call void @__captured_stmt.3(i32* [[J]], i32 [[OMP_LOOP_IV19]], %struct.anon.2* [[AGG_CAPTURED9]]), !llvm.access.group [[ACC_GRP6:![0-9]+]]
+// CHECK-NEXT: [[A22:%.*]] = getelementptr inbounds [[STRUCT_P]], %struct.P* [[PP]], i32 0, i32 0
+// CHECK-NEXT: [[TMP14:%.*]] = load i32, i32* [[A22]], align 4, !llvm.access.group [[ACC_GRP6]]
+// CHECK-NEXT: [[TMP15:%.*]] = load i32*, i32** [[C_ADDR]], align 8, !llvm.access.group [[ACC_GRP6]]
+// CHECK-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group [[ACC_GRP6]]
+// CHECK-NEXT: [[IDXPROM23:%.*]] = sext i32 [[TMP16]] to i64
+// CHECK-NEXT: [[ARRAYIDX24:%.*]] = getelementptr inbounds i32, i32* [[TMP15]], i64 [[IDXPROM23]]
+// CHECK-NEXT: store i32 [[TMP14]], i32* [[ARRAYIDX24]], align 4, !llvm.access.group [[ACC_GRP6]]
+// CHECK-NEXT: br label [[OMP_LOOP_INC16]]
+// CHECK: omp_loop.inc16:
+// CHECK-NEXT: [[OMP_LOOP_NEXT21]] = add nuw i32 [[OMP_LOOP_IV19]], 1
+// CHECK-NEXT: br label [[OMP_LOOP_HEADER13]], !llvm.loop [[LOOP7:![0-9]+]]
+// CHECK: omp_loop.exit17:
+// CHECK-NEXT: br label [[OMP_LOOP_AFTER18:%.*]]
+// CHECK: omp_loop.after18:
+// CHECK-NEXT: ret void
+//
+void simple(float *a, float *b, int *c) {
+ S s, *p;
+ P pp;
+#pragma omp simd safelen(3) simdlen(2)
+ for (int i = 3; i < 32; i += 5) {
+ a[i] = b[i] + s.a + p->a;
+ }
+
+#pragma omp simd
+ for (int j = 3; j < 32; j += 5) {
+ c[j] = pp.a;
+ }
+}
+//.
+// CHECK: attributes #0 = { mustprogress noinline nounwind optnone "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+mmx,+sse,+sse2,+x87" }
+// CHECK: attributes #1 = { noinline nounwind optnone "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+cx8,+mmx,+sse,+sse2,+x87" }
+//.
+// CHECK: !0 = !{i32 1, !"wchar_size", i32 4}
+// CHECK: !1 = !{i32 7, !"openmp", i32 45}
+// CHECK: !3 = distinct !{!3, !4, !5}
+// CHECK: !4 = !{!"llvm.loop.vectorize.enable", i1 true}
+// CHECK: !5 = !{!"llvm.loop.vectorize.width", i32 2}
+// CHECK: !6 = distinct !{}
+// CHECK: !7 = distinct !{!7, !8, !4}
+// CHECK: !8 = !{!"llvm.loop.parallel_accesses", !6}
+//.
diff --git a/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h b/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
index 5ae9baab0e5d6..369392df3fb7c 100644
--- a/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+++ b/llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
@@ -620,7 +620,9 @@ class OpenMPIRBuilder {
/// \param Loop The loop to simd-ize.
/// \param IfCond The value which corresponds to the if clause condition.
/// \param Simdlen The Simdlen length to apply to the simd loop.
- void applySimd(CanonicalLoopInfo *Loop, Value *IfCond, ConstantInt *Simdlen);
+ /// \param Safelen The Safelen length to apply to the simd loop.
+ void applySimd(CanonicalLoopInfo *Loop, Value *IfCond, ConstantInt *Simdlen,
+ ConstantInt *Safelen);
/// Generator for '#omp flush'
///
diff --git a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
index d504a16738500..ed4cfe369a60a 100644
--- a/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+++ b/llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
@@ -2966,7 +2966,7 @@ void OpenMPIRBuilder::createIfVersion(CanonicalLoopInfo *CanonicalLoop,
}
void OpenMPIRBuilder::applySimd(CanonicalLoopInfo *CanonicalLoop, Value *IfCond,
- ConstantInt *Simdlen) {
+ ConstantInt *Simdlen, ConstantInt *Safelen) {
LLVMContext &Ctx = Builder.getContext();
Function *F = CanonicalLoop->getFunction();
@@ -3016,28 +3016,40 @@ void OpenMPIRBuilder::applySimd(CanonicalLoopInfo *CanonicalLoop, Value *IfCond,
Reachable.insert(Block);
}
- // Add access group metadata to memory-access instructions.
- MDNode *AccessGroup = MDNode::getDistinct(Ctx, {});
- for (BasicBlock *BB : Reachable)
- addSimdMetadata(BB, AccessGroup, LI);
+ SmallVector<Metadata *> LoopMDList;
+
+ // In presence of finite 'safelen', it may be unsafe to mark all
+ // the memory instructions parallel, because loop-carried
+ // dependences of 'safelen' iterations are possible.
+ if (Safelen == nullptr) {
+ // Add access group metadata to memory-access instructions.
+ MDNode *AccessGroup = MDNode::getDistinct(Ctx, {});
+ for (BasicBlock *BB : Reachable)
+ addSimdMetadata(BB, AccessGroup, LI);
+ // TODO: If the loop has existing parallel access metadata, have
+ // to combine two lists.
+ LoopMDList.push_back(MDNode::get(
+ Ctx, {MDString::get(Ctx, "llvm.loop.parallel_accesses"), AccessGroup}));
+ }
// Use the above access group metadata to create loop level
// metadata, which should be distinct for each loop.
ConstantAsMetadata *BoolConst =
ConstantAsMetadata::get(ConstantInt::getTrue(Type::getInt1Ty(Ctx)));
- // TODO: If the loop has existing parallel access metadata, have
- // to combine two lists.
- addLoopMetadata(
- CanonicalLoop,
- {MDNode::get(Ctx, {MDString::get(Ctx, "llvm.loop.parallel_accesses"),
- AccessGroup}),
- MDNode::get(Ctx, {MDString::get(Ctx, "llvm.loop.vectorize.enable"),
- BoolConst})});
- if (Simdlen != nullptr)
- addLoopMetadata(
- CanonicalLoop,
+ LoopMDList.push_back(MDNode::get(
+ Ctx, {MDString::get(Ctx, "llvm.loop.vectorize.enable"), BoolConst}));
+
+ if (Simdlen || Safelen) {
+ // If both simdlen and safelen clauses are specified, the value of the
+ // simdlen parameter must be less than or equal to the value of the safelen
+ // parameter. Therefore, use safelen only in the absence of simdlen.
+ ConstantInt *VectorizeWidth = Simdlen == nullptr ? Safelen : Simdlen;
+ LoopMDList.push_back(
MDNode::get(Ctx, {MDString::get(Ctx, "llvm.loop.vectorize.width"),
- ConstantAsMetadata::get(Simdlen)}));
+ ConstantAsMetadata::get(VectorizeWidth)}));
+ }
+
+ addLoopMetadata(CanonicalLoop, LoopMDList);
}
/// Create the TargetMachine object to query the backend for optimization
diff --git a/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp b/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
index 7e3b5481e7bdc..aa120c1a08878 100644
--- a/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
+++ b/llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
@@ -1771,7 +1771,8 @@ TEST_F(OpenMPIRBuilderTest, ApplySimd) {
CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32);
// Simd-ize the loop.
- OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, /* Simdlen */ nullptr);
+ OMPBuilder.applySimd(CLI, /* IfCond */ nullptr, /* Simdlen */ nullptr,
+ /* Safelen */ nullptr);
OMPBuilder.finalize();
EXPECT_FALSE(verifyModule(*M, &errs()));
@@ -1802,8 +1803,9 @@ TEST_F(OpenMPIRBuilderTest, ApplySimdlen) {
CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32);
// Simd-ize the loop.
- OMPBuilder.applySimd(CLI, /*IfCond */ nullptr,
- ConstantInt::get(Type::getInt32Ty(Ctx), 3));
+ OMPBuilder.applySimd(CLI, /* IfCond */ nullptr,
+ ConstantInt::get(Type::getInt32Ty(Ctx), 3),
+ /* Safelen */ nullptr);
OMPBuilder.finalize();
EXPECT_FALSE(verifyModule(*M, &errs()));
@@ -1829,6 +1831,74 @@ TEST_F(OpenMPIRBuilderTest, ApplySimdlen) {
}));
}
+TEST_F(OpenMPIRBuilderTest, ApplySafelen) {
+ OpenMPIRBuilder OMPBuilder(*M);
+
+ CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32);
+
+ // Simd-ize the loop.
+ OMPBuilder.applySimd(CLI, /* IfCond */ nullptr,
+ /* Simdlen */ nullptr,
+ ConstantInt::get(Type::getInt32Ty(Ctx), 3));
+
+ OMPBuilder.finalize();
+ EXPECT_FALSE(verifyModule(*M, &errs()));
+
+ PassBuilder PB;
+ FunctionAnalysisManager FAM;
+ PB.registerFunctionAnalyses(FAM);
+ LoopInfo &LI = FAM.getResult<LoopAnalysis>(*F);
+
+ const std::vector<Loop *> &TopLvl = LI.getTopLevelLoops();
+ EXPECT_EQ(TopLvl.size(), 1u);
+
+ Loop *L = TopLvl.front();
+ EXPECT_FALSE(findStringMetadataForLoop(L, "llvm.loop.parallel_accesses"));
+ EXPECT_TRUE(getBooleanLoopAttribute(L, "llvm.loop.vectorize.enable"));
+ EXPECT_EQ(getIntLoopAttribute(L, "llvm.loop.vectorize.width"), 3);
+
+ // Check for llvm.access.group metadata attached to the printf
+ // function in the loop body.
+ BasicBlock *LoopBody = CLI->getBody();
+ EXPECT_FALSE(any_of(*LoopBody, [](Instruction &I) {
+ return I.getMetadata("llvm.access.group") != nullptr;
+ }));
+}
+
+TEST_F(OpenMPIRBuilderTest, ApplySimdlenSafelen) {
+ OpenMPIRBuilder OMPBuilder(*M);
+
+ CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32);
+
+ // Simd-ize the loop.
+ OMPBuilder.applySimd(CLI, /* IfCond */ nullptr,
+ ConstantInt::get(Type::getInt32Ty(Ctx), 2),
+ ConstantInt::get(Type::getInt32Ty(Ctx), 3));
+
+ OMPBuilder.finalize();
+ EXPECT_FALSE(verifyModule(*M, &errs()));
+
+ PassBuilder PB;
+ FunctionAnalysisManager FAM;
+ PB.registerFunctionAnalyses(FAM);
+ LoopInfo &LI = FAM.getResult<LoopAnalysis>(*F);
+
+ const std::vector<Loop *> &TopLvl = LI.getTopLevelLoops();
+ EXPECT_EQ(TopLvl.size(), 1u);
+
+ Loop *L = TopLvl.front();
+ EXPECT_FALSE(findStringMetadataForLoop(L, "llvm.loop.parallel_accesses"));
+ EXPECT_TRUE(getBooleanLoopAttribute(L, "llvm.loop.vectorize.enable"));
+ EXPECT_EQ(getIntLoopAttribute(L, "llvm.loop.vectorize.width"), 2);
+
+ // Check for llvm.access.group metadata attached to the printf
+ // function in the loop body.
+ BasicBlock *LoopBody = CLI->getBody();
+ EXPECT_FALSE(any_of(*LoopBody, [](Instruction &I) {
+ return I.getMetadata("llvm.access.group") != nullptr;
+ }));
+}
+
TEST_F(OpenMPIRBuilderTest, ApplySimdLoopIf) {
OpenMPIRBuilder OMPBuilder(*M);
IRBuilder<> Builder(BB);
@@ -1846,7 +1916,8 @@ TEST_F(OpenMPIRBuilderTest, ApplySimdLoopIf) {
CanonicalLoopInfo *CLI = buildSingleLoopFunction(DL, OMPBuilder, 32);
// Simd-ize the loop with if condition
- OMPBuilder.applySimd(CLI, IfCmp, ConstantInt::get(Type::getInt32Ty(Ctx), 3));
+ OMPBuilder.applySimd(CLI, IfCmp, ConstantInt::get(Type::getInt32Ty(Ctx), 3),
+ /* Safelen */ nullptr);
OMPBuilder.finalize();
EXPECT_FALSE(verifyModule(*M, &errs()));
diff --git a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
index ba231d643f4d3..76bbb2824d5e3 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
@@ -973,7 +973,7 @@ convertOmpSimdLoop(Operation &opInst, llvm::IRBuilderBase &builder,
ompBuilder->applySimd(
loopInfo,
loop.if_expr() ? moduleTranslation.lookupValue(loop.if_expr()) : nullptr,
- simdlen);
+ simdlen, nullptr);
builder.restoreIP(afterIP);
return success();
More information about the llvm-commits
mailing list