[llvm] 230e277 - [DAGCombiner][NFC] Merge two if statement into one.
via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 17 19:13:25 PDT 2022
Author: wanglian
Date: 2022-08-18T10:12:35+08:00
New Revision: 230e277dfe42aebb362dcf0c62206efebea51e17
URL: https://github.com/llvm/llvm-project/commit/230e277dfe42aebb362dcf0c62206efebea51e17
DIFF: https://github.com/llvm/llvm-project/commit/230e277dfe42aebb362dcf0c62206efebea51e17.diff
LOG: [DAGCombiner][NFC] Merge two if statement into one.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D131941
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index ae64f1afb50b0..1739f18041831 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -4112,21 +4112,21 @@ SDValue DAGCombiner::visitMUL(SDNode *N) {
DAG.getNode(ISD::MUL, SDLoc(N1), VT, N0.getOperand(1), N1));
// Fold (mul (vscale * C0), C1) to (vscale * (C0 * C1)).
- if (N0.getOpcode() == ISD::VSCALE)
- if (ConstantSDNode *NC1 = isConstOrConstSplat(N1)) {
- const APInt &C0 = N0.getConstantOperandAPInt(0);
- const APInt &C1 = NC1->getAPIntValue();
- return DAG.getVScale(DL, VT, C0 * C1);
- }
+ ConstantSDNode *NC1 = isConstOrConstSplat(N1);
+ if (N0.getOpcode() == ISD::VSCALE && NC1) {
+ const APInt &C0 = N0.getConstantOperandAPInt(0);
+ const APInt &C1 = NC1->getAPIntValue();
+ return DAG.getVScale(DL, VT, C0 * C1);
+ }
// Fold (mul step_vector(C0), C1) to (step_vector(C0 * C1)).
APInt MulVal;
- if (N0.getOpcode() == ISD::STEP_VECTOR)
- if (ISD::isConstantSplatVector(N1.getNode(), MulVal)) {
- const APInt &C0 = N0.getConstantOperandAPInt(0);
- APInt NewStep = C0 * MulVal;
- return DAG.getStepVector(DL, VT, NewStep);
- }
+ if (N0.getOpcode() == ISD::STEP_VECTOR &&
+ ISD::isConstantSplatVector(N1.getNode(), MulVal)) {
+ const APInt &C0 = N0.getConstantOperandAPInt(0);
+ APInt NewStep = C0 * MulVal;
+ return DAG.getStepVector(DL, VT, NewStep);
+ }
// Fold ((mul x, 0/undef) -> 0,
// (mul x, 1) -> x) -> x)
@@ -9179,23 +9179,22 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
return NewSHL;
// Fold (shl (vscale * C0), C1) to (vscale * (C0 << C1)).
- if (N0.getOpcode() == ISD::VSCALE)
- if (ConstantSDNode *NC1 = isConstOrConstSplat(N->getOperand(1))) {
- const APInt &C0 = N0.getConstantOperandAPInt(0);
- const APInt &C1 = NC1->getAPIntValue();
- return DAG.getVScale(SDLoc(N), VT, C0 << C1);
- }
+ if (N0.getOpcode() == ISD::VSCALE && N1C) {
+ const APInt &C0 = N0.getConstantOperandAPInt(0);
+ const APInt &C1 = N1C->getAPIntValue();
+ return DAG.getVScale(SDLoc(N), VT, C0 << C1);
+ }
// Fold (shl step_vector(C0), C1) to (step_vector(C0 << C1)).
APInt ShlVal;
- if (N0.getOpcode() == ISD::STEP_VECTOR)
- if (ISD::isConstantSplatVector(N1.getNode(), ShlVal)) {
- const APInt &C0 = N0.getConstantOperandAPInt(0);
- if (ShlVal.ult(C0.getBitWidth())) {
- APInt NewStep = C0 << ShlVal;
- return DAG.getStepVector(SDLoc(N), VT, NewStep);
- }
+ if (N0.getOpcode() == ISD::STEP_VECTOR &&
+ ISD::isConstantSplatVector(N1.getNode(), ShlVal)) {
+ const APInt &C0 = N0.getConstantOperandAPInt(0);
+ if (ShlVal.ult(C0.getBitWidth())) {
+ APInt NewStep = C0 << ShlVal;
+ return DAG.getStepVector(SDLoc(N), VT, NewStep);
}
+ }
return SDValue();
}
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