[PATCH] D130769: [RISCV] Combine and remove redundant ADD/SUB instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

In D130769#3728922 <https://reviews.llvm.org/D130769#3728922>, @reames wrote:

> I'm not convinced as to the motivation of this patch.  Running the provided IR file through instcombine greatly simplifies it, and seems to remove the motivating pattern.  As such, either this is an overly reduced test (which is fine, but more motivation is needed in review description), or this is fixing a pass ordering problem in the middle end in the wrong place.
>
> Can you explain why this is the right way to fix this problem?  At the moment, I'm unconvinced.

I agree the tests are overly reduced. Based on the description, I think this patch is trying to fix cases where tail duplication duplicates a block that originally contained a phi. This allows duplicated code to end up in the basic block that produced the original incoming value. I've seen this happen where the incoming values are constants. After duplication we end up still putting the constant in a register instead of folding it. I don't think this patch addresses that case though.


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https://reviews.llvm.org/D130769