[llvm] 7a355e9 - [AMDGPU][MC][NFC] Refine SMEM store, probe and discard definitions.
Ivan Kosarev via llvm-commits
llvm-commits at lists.llvm.org
Wed Aug 17 05:55:59 PDT 2022
Author: Ivan Kosarev
Date: 2022-08-17T13:54:26+01:00
New Revision: 7a355e90271c1635a431f63b0e2011976ab05fd1
URL: https://github.com/llvm/llvm-project/commit/7a355e90271c1635a431f63b0e2011976ab05fd1
DIFF: https://github.com/llvm/llvm-project/commit/7a355e90271c1635a431f63b0e2011976ab05fd1.diff
LOG: [AMDGPU][MC][NFC] Refine SMEM store, probe and discard definitions.
Reviewed By: dp
Differential Revision: https://reviews.llvm.org/D131968
Added:
Modified:
llvm/lib/Target/AMDGPU/SMInstructions.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/SMInstructions.td b/llvm/lib/Target/AMDGPU/SMInstructions.td
index b7e8eadfe71de..4699b0ecf2ecb 100644
--- a/llvm/lib/Target/AMDGPU/SMInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SMInstructions.td
@@ -102,21 +102,19 @@ def SGPR_IMM_Offset : OffsetMode<1, 1, "_SGPR_IMM",
(ins SReg_32:$soffset, smem_offset_mod:$offset),
"$soffset$offset">;
-class SM_Probe_Pseudo <string opName, string variant, RegisterClass baseClass,
- dag offsets, string asmOffsets,
- bit hasOffset, bit hasSOffset>
+class SM_Probe_Pseudo <string opName, RegisterClass baseClass, OffsetMode offsets>
: SM_Pseudo<opName, (outs),
- !con((ins i8imm:$sdata, baseClass:$sbase), offsets),
- " $sdata, $sbase, " # asmOffsets> {
+ !con((ins i8imm:$sdata, baseClass:$sbase), offsets.Ins),
+ " $sdata, $sbase, " # offsets.Asm> {
let mayLoad = 0;
let mayStore = 0;
let has_glc = 0;
let LGKM_CNT = 0;
let ScalarStore = 0;
let hasSideEffects = 1;
- let has_offset = hasOffset;
- let has_soffset = hasSOffset;
- let PseudoInstr = opName # variant;
+ let has_offset = offsets.HasOffset;
+ let has_soffset = offsets.HasSOffset;
+ let PseudoInstr = opName # offsets.Variant;
}
class SM_Load_Pseudo <string opName, RegisterClass baseClass,
@@ -135,30 +133,34 @@ class SM_Load_Pseudo <string opName, RegisterClass baseClass,
}
class SM_Store_Pseudo <string opName, RegisterClass baseClass,
- RegisterClass srcClass, dag ins, string asmOps>
- : SM_Pseudo<opName, (outs), ins, asmOps, []> {
+ RegisterClass srcClass, OffsetMode offsets>
+ : SM_Pseudo<opName, (outs), !con((ins srcClass:$sdata, baseClass:$sbase),
+ offsets.Ins, (ins CPol:$cpol)),
+ " $sdata, $sbase, " # offsets.Asm # "$cpol"> {
RegisterClass BaseClass = baseClass;
RegisterClass SrcClass = srcClass;
let mayLoad = 0;
let mayStore = 1;
let has_glc = 1;
let has_dlc = 1;
+ let has_offset = offsets.HasOffset;
+ let has_soffset = offsets.HasSOffset;
let ScalarStore = 1;
+ let PseudoInstr = opName # offsets.Variant;
}
-class SM_Discard_Pseudo <string opName, string variant, dag offsets,
- string asmOffsets, bit hasOffset, bit hasSOffset>
- : SM_Pseudo<opName, (outs), !con((ins SReg_64:$sbase), offsets),
- " $sbase, " # asmOffsets> {
+class SM_Discard_Pseudo <string opName, OffsetMode offsets>
+ : SM_Pseudo<opName, (outs), !con((ins SReg_64:$sbase), offsets.Ins),
+ " $sbase, " # offsets.Asm> {
let mayLoad = 0;
let mayStore = 0;
let has_glc = 0;
let has_sdst = 0;
let ScalarStore = 0;
let hasSideEffects = 1;
- let has_offset = hasOffset;
- let has_soffset = hasSOffset;
- let PseudoInstr = opName # variant;
+ let has_offset = offsets.HasOffset;
+ let has_soffset = offsets.HasSOffset;
+ let PseudoInstr = opName # offsets.Variant;
}
multiclass SM_Pseudo_Loads<string opName,
@@ -172,37 +174,15 @@ multiclass SM_Pseudo_Loads<string opName,
multiclass SM_Pseudo_Stores<string opName,
RegisterClass baseClass,
RegisterClass srcClass> {
- def _IMM : SM_Store_Pseudo <opName, baseClass, srcClass,
- (ins srcClass:$sdata, baseClass:$sbase, i32imm:$offset, CPol:$cpol),
- " $sdata, $sbase, $offset$cpol"> {
- let has_offset = 1;
- let PseudoInstr = opName # "_IMM";
- }
-
- def _SGPR : SM_Store_Pseudo <opName, baseClass, srcClass,
- (ins srcClass:$sdata, baseClass:$sbase, SReg_32:$soffset, CPol:$cpol),
- " $sdata, $sbase, $soffset$cpol"> {
- let has_soffset = 1;
- let PseudoInstr = opName # "_SGPR";
- }
-
- def _SGPR_IMM : SM_Store_Pseudo <opName, baseClass, srcClass,
- (ins srcClass:$sdata, baseClass:$sbase, SReg_32:$soffset, i32imm:$offset,
- CPol:$cpol),
- " $sdata, $sbase, $soffset$offset$cpol"> {
- let has_offset = 1;
- let has_soffset = 1;
- let PseudoInstr = opName # "_SGPR_IMM";
- }
+ def _IMM : SM_Store_Pseudo <opName, baseClass, srcClass, IMM_Offset>;
+ def _SGPR : SM_Store_Pseudo <opName, baseClass, srcClass, SGPR_Offset>;
+ def _SGPR_IMM : SM_Store_Pseudo <opName, baseClass, srcClass, SGPR_IMM_Offset>;
}
multiclass SM_Pseudo_Discards<string opName> {
- def _IMM : SM_Discard_Pseudo <opName, "_IMM",
- (ins smem_offset:$offset), "$offset", 1, 0>;
- def _SGPR : SM_Discard_Pseudo <opName, "_SGPR",
- (ins SReg_32:$soffset), "$soffset", 0, 1>;
- def _SGPR_IMM : SM_Discard_Pseudo <opName, "_SGPR_IMM",
- (ins SReg_32:$soffset, smem_offset_mod:$offset), "$soffset$offset", 1, 1>;
+ def _IMM : SM_Discard_Pseudo <opName, IMM_Offset>;
+ def _SGPR : SM_Discard_Pseudo <opName, SGPR_Offset>;
+ def _SGPR_IMM : SM_Discard_Pseudo <opName, SGPR_IMM_Offset>;
}
class SM_Time_Pseudo<string opName, SDPatternOperator node = null_frag> : SM_Pseudo<
@@ -225,12 +205,9 @@ class SM_Inval_Pseudo <string opName, SDPatternOperator node = null_frag> : SM_P
}
multiclass SM_Pseudo_Probe<string opName, RegisterClass baseClass> {
- def _IMM : SM_Probe_Pseudo <opName, "_IMM", baseClass,
- (ins smem_offset:$offset), "$offset", 1, 0>;
- def _SGPR : SM_Probe_Pseudo <opName, "_SGPR", baseClass,
- (ins SReg_32:$soffset), "$soffset", 0, 1>;
- def _SGPR_IMM : SM_Probe_Pseudo <opName, "_SGPR_IMM", baseClass,
- (ins SReg_32:$soffset, smem_offset_mod:$offset), "$soffset$offset", 1, 1>;
+ def _IMM : SM_Probe_Pseudo <opName, baseClass, IMM_Offset>;
+ def _SGPR : SM_Probe_Pseudo <opName, baseClass, SGPR_Offset>;
+ def _SGPR_IMM : SM_Probe_Pseudo <opName, baseClass, SGPR_IMM_Offset>;
}
class SM_WaveId_Pseudo<string opName, SDPatternOperator node> : SM_Pseudo<
@@ -605,23 +582,21 @@ class SMEM_Real_Store_Base_vi <bits<8> op, SM_Pseudo ps> : SMEM_Real_vi <op, ps>
let Inst{12-6} = !if(ps.has_sdst, sdata{6-0}, ?);
}
-class SMEM_Real_Store_vi <bits<8> op, string ps, dag offsets>
- : SMEM_Real_Store_Base_vi <op, !cast<SM_Pseudo>(ps)> {
- RegisterClass SrcClass = !cast<SM_Store_Pseudo>(ps).SrcClass;
- RegisterClass BaseClass = !cast<SM_Store_Pseudo>(ps).BaseClass;
+class SMEM_Real_Store_vi <bits<8> op, string ps, OffsetMode offsets>
+ : SMEM_Real_Store_Base_vi <op, !cast<SM_Pseudo>(ps # offsets.Variant)> {
+ RegisterClass SrcClass = !cast<SM_Store_Pseudo>(ps # offsets.Variant).SrcClass;
+ RegisterClass BaseClass = !cast<SM_Store_Pseudo>(ps # offsets.Variant).BaseClass;
let InOperandList = !con((ins SrcClass:$sdata, BaseClass:$sbase),
- offsets, (ins CPol:$cpol));
+ offsets.Ins, (ins CPol:$cpol));
}
multiclass SM_Real_Stores_vi<bits<8> op, string ps> {
- def _IMM_vi : SMEM_Real_Store_vi <op, ps#_IMM, (ins smem_offset:$offset)>;
- def _SGPR_vi : SMEM_Real_Store_vi <op, ps#_SGPR, (ins SReg_32:$soffset)>;
- def _SGPR_alt_gfx9 : SMEM_Real_Store_vi <op, ps#"_SGPR",
- (ins SReg_32:$soffset)>,
+ def _IMM_vi : SMEM_Real_Store_vi <op, ps, IMM_Offset>;
+ def _SGPR_vi : SMEM_Real_Store_vi <op, ps, SGPR_Offset>;
+ def _SGPR_alt_gfx9 : SMEM_Real_Store_vi <op, ps, SGPR_Offset>,
SMEM_Real_SGPR_alt_gfx9;
let IsGFX9SpecificEncoding = true in
- def _SGPR_IMM_gfx9 : SMEM_Real_Store_vi <
- op, ps#"_SGPR_IMM", (ins SReg_32:$soffset, smem_offset_mod:$offset)>;
+ def _SGPR_IMM_gfx9 : SMEM_Real_Store_vi <op, ps, SGPR_IMM_Offset>;
}
multiclass SM_Real_Probe_vi<bits<8> op, string ps> {
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