[PATCH] D124697: Distinguish between different forms of "address-taken" MachineBasicBlocks

[Eli Friedman via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGcfd2c5ce580f: Untangle the mess which is MachineBasicBlock::hasAddressTaken(). (authored by efriedma).

Changed prior to commit:
  https://reviews.llvm.org/D124697?vs=439861&id=453153#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D124697/new/

https://reviews.llvm.org/D124697

Files:
  llvm/include/llvm/CodeGen/MachineBasicBlock.h
  llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/MIRParser/MILexer.cpp
  llvm/lib/CodeGen/MIRParser/MILexer.h
  llvm/lib/CodeGen/MIRParser/MIParser.cpp
  llvm/lib/CodeGen/MachineBasicBlock.cpp
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
  llvm/lib/Target/VE/VEISelLowering.cpp
  llvm/lib/Target/X86/X86FrameLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86IndirectThunks.cpp
  llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-blockaddress.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-blockaddress.mir
  llvm/test/CodeGen/AArch64/branch-target-enforcement.mir
  llvm/test/CodeGen/AArch64/speculation-hardening-sls.mir
  llvm/test/CodeGen/ARM/ifcvt-diamond-unanalyzable-common.mir
  llvm/test/CodeGen/ARM/ifcvt-size.mir
  llvm/test/CodeGen/Hexagon/bank-conflict.mir
  llvm/test/CodeGen/Hexagon/hwloop-redef-imm.mir
  llvm/test/CodeGen/Hexagon/loop_correctness.ll
  llvm/test/CodeGen/Hexagon/pipeliner/swp-phi-start.mir
  llvm/test/CodeGen/Hexagon/swp-carried-dep1.mir
  llvm/test/CodeGen/Hexagon/swp-carried-dep2.mir
  llvm/test/CodeGen/MIR/Generic/basic-blocks.mir
  llvm/test/CodeGen/MIR/X86/block-address-operands.mir
  llvm/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir
  llvm/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir
  llvm/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir
  llvm/test/CodeGen/MIR/X86/undefined-ir-block-in-blockaddress.mir
  llvm/test/CodeGen/MIR/X86/undefined-ir-block-slot-in-blockaddress.mir
  llvm/test/CodeGen/X86/callbr-asm-kill.mir
  llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll
  llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
  llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir
  llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks.mir
  llvm/test/DebugInfo/MIR/X86/ldv_unreachable_blocks2.mir
  llvm/test/tools/llvm-reduce/mir/preserve-block-info.mir
  llvm/tools/llvm-reduce/ReducerWorkItem.cpp

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