[llvm] 1380b21 - [RISCV] Use setcc's original SDLoc when inverting it in performSUBCombine.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2022-08-16T15:40:09-07:00
New Revision: 1380b21ceba7b7b19e960da5df68dcd5cba1b091

URL: https://github.com/llvm/llvm-project/commit/1380b21ceba7b7b19e960da5df68dcd5cba1b091
DIFF: https://github.com/llvm/llvm-project/commit/1380b21ceba7b7b19e960da5df68dcd5cba1b091.diff

LOG: [RISCV] Use setcc's original SDLoc when inverting it in performSUBCombine.

We change seteq<->setne but it doesn't change the semantics
of the setcc. We should keep original debug location. This is
consistent with visitXor in the generic DAGCombiner.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index fc9e8d4a5778..11ee31a033d9 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -8298,8 +8298,8 @@ static SDValue performSUBCombine(SDNode *N, SelectionDAG &DAG) {
       // and may increase the number of constants we need.
       if (ImmValMinus1.isSignedIntN(12)) {
         CCVal = ISD::getSetCCInverse(CCVal, SetCCOpVT);
-        SDValue NewN0 =
-            DAG.getSetCC(SDLoc(N), VT, N1.getOperand(0), N1.getOperand(1), CCVal);
+        SDValue NewN0 = DAG.getSetCC(SDLoc(N0), VT, N1.getOperand(0),
+                                     N1.getOperand(1), CCVal);
         SDValue NewN1 = DAG.getConstant(ImmValMinus1, SDLoc(N), VT);
         return DAG.getNode(ISD::ADD, SDLoc(N), VT, NewN0, NewN1);
       }