[PATCH] D131356: [InstCombine] reassociate bitwise logic chains based on uses

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 added a comment.

In D131356#3725827 <https://reviews.llvm.org/D131356#3725827>, @spatel wrote:

> Presumably, these are fuzzer bugs, but some more issues that should be solved with this patch:
> https://github.com/llvm/llvm-project/issues/57028
> https://github.com/llvm/llvm-project/issues/57120
>
> They are not identical patterns, but have the shared trait of a single value with multiple uses in the logic chain.

Maybe we can run ipsccp until no changed(Similar to Instcombine) to fix all these tickets. like:

  unsigned Iteration = 0;
  bool MadeChanges = false;
  while (runIPSCCP(M, DL, GetTLI, getAnalysis)) {
    MadeChanges = true;
  }
  
  if (!MadeChanges)
    return PreservedAnalyses::all();


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  https://reviews.llvm.org/D131356/new/

https://reviews.llvm.org/D131356