[PATCH] D131962: [RegisterInfoEmitter] Generate isConstantPhysReg(). NFCI

[Alexander Richardson via Phabricator via llvm-commits]

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Since D131958 <https://reviews.llvm.org/D131958>, the RegisterInfo Tablegen files contain the information
whether a given register is constant or not, so we might as well use this
information to generate the implementation of isConstantPhysReg().

I've marked isConstantPhysReg() as final in this generated file to ensure
that changes are made to tablegen instead of overriding this function,
but if that turns out to be too restrictive, we can remove the qualifier.

This should be pretty much NFC (since the previous commit added the
isConstant flag to all registers handled by isConstantPhysReg(), but I did
notice that e.g. the AMDGPU generated file also includes the LO16/HI16
registers now.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D131962

Files:
  llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
  llvm/lib/Target/AArch64/AArch64RegisterInfo.h
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/lib/Target/LoongArch/LoongArchRegisterInfo.cpp
  llvm/lib/Target/LoongArch/LoongArchRegisterInfo.h
  llvm/lib/Target/Mips/MipsRegisterInfo.cpp
  llvm/lib/Target/Mips/MipsRegisterInfo.h
  llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
  llvm/lib/Target/RISCV/RISCVRegisterInfo.h
  llvm/lib/Target/VE/VERegisterInfo.cpp
  llvm/lib/Target/VE/VERegisterInfo.h
  llvm/utils/TableGen/RegisterInfoEmitter.cpp

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