[PATCH] D131958: Add all constant physical registers to callee preserved masks

[Alexander Richardson via Phabricator via llvm-commits]

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This allows MachineCopyPropagation to eliminate copies of constant registers
such as zero registers. They were previously not being eliminated as the
check for MO.clobbersPhysReg(AvailSrc) would return true for constant
registers such as MIPS $zero.

To avoid having to manually add the zero registers to all CalleeSavedRegs
instantiations in tablegen, I instead added a new isConstant bit to the
Register and set this for MIPS, RISC-V, and AArch64 zero registers.
RegisterInfoEmitter.cpp looks at this flag and adds all constant registers
to the preserved register mask.

This may also benefit other passes but so far I have only seen differences
in MachineCopyPropagation.

Original source: https://github.com/CTSRD-CHERI/llvm-project/commit/8588d8b81458ed6d87b674893e7752e6a6915574


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D131958

Files:
  llvm/include/llvm/Target/Target.td
  llvm/lib/Target/AArch64/AArch64RegisterInfo.td
  llvm/lib/Target/Mips/MipsRegisterInfo.td
  llvm/lib/Target/RISCV/RISCVRegisterInfo.td
  llvm/test/CodeGen/AArch64/avoid-zero-copy.mir
  llvm/test/CodeGen/Mips/avoid-zero-copy.mir
  llvm/test/CodeGen/RISCV/double-convert.ll
  llvm/utils/TableGen/CodeGenRegisters.cpp
  llvm/utils/TableGen/CodeGenRegisters.h
  llvm/utils/TableGen/RegisterInfoEmitter.cpp

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