[PATCH] D131771: [RISCV] : Add support for immediate operands.

EverRest via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 16 04:08:26 PDT 2022


MarkGoncharovAl updated this revision to Diff 452944.
MarkGoncharovAl added a comment.

Unuseful stray blank line was removed.

                                                                                                                       

Operand VI was renamed to VTYPEI.

                                                                                                                       

Operand type for SIMM5_NONZERO and unuseful ImmLeaf were removed.

Run testsuite - success.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131771/new/

https://reviews.llvm.org/D131771

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoV.td

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