[llvm] a9d46d9 - [LoongArch] Add codegen support for fabs

Weining Lu via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 15 23:42:01 PDT 2022


Author: gonglingqin
Date: 2022-08-16T14:41:27+08:00
New Revision: a9d46d9af36614e320ae24227e9965414f3aa330

URL: https://github.com/llvm/llvm-project/commit/a9d46d9af36614e320ae24227e9965414f3aa330
DIFF: https://github.com/llvm/llvm-project/commit/a9d46d9af36614e320ae24227e9965414f3aa330.diff

LOG: [LoongArch] Add codegen support for fabs

Differential Revision: https://reviews.llvm.org/D131871

Added: 
    llvm/test/CodeGen/LoongArch/fabs.ll

Modified: 
    llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
    llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
index 20448492a558..f2b47d5818b4 100644
--- a/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
@@ -143,6 +143,7 @@ def : PatFprFpr<fsub, FSUB_S, FPR32>;
 def : PatFprFpr<fmul, FMUL_S, FPR32>;
 def : PatFprFpr<fdiv, FDIV_S, FPR32>;
 def : PatFpr<fneg, FNEG_S, FPR32>;
+def : PatFpr<fabs, FABS_S, FPR32>;
 
 /// Setcc
 

diff  --git a/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
index bb50cec9f4c0..ad120eb2949f 100644
--- a/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchFloat64InstrInfo.td
@@ -149,6 +149,7 @@ def : PatFprFpr<fsub, FSUB_D, FPR64>;
 def : PatFprFpr<fmul, FMUL_D, FPR64>;
 def : PatFprFpr<fdiv, FDIV_D, FPR64>;
 def : PatFpr<fneg, FNEG_D, FPR64>;
+def : PatFpr<fabs, FABS_D, FPR64>;
 
 /// Setcc
 

diff  --git a/llvm/test/CodeGen/LoongArch/fabs.ll b/llvm/test/CodeGen/LoongArch/fabs.ll
new file mode 100644
index 000000000000..3f3dacd9b71b
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/fabs.ll
@@ -0,0 +1,56 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 --mattr=+f,-d < %s | FileCheck %s --check-prefix=LA32F
+; RUN: llc --mtriple=loongarch32 --mattr=+d < %s | FileCheck %s --check-prefix=LA32D
+; RUN: llc --mtriple=loongarch64 --mattr=+f,-d < %s | FileCheck %s --check-prefix=LA64F
+; RUN: llc --mtriple=loongarch64 --mattr=+d < %s | FileCheck %s --check-prefix=LA64D
+
+declare float @llvm.fabs.f32(float)
+declare double @llvm.fabs.f64(double)
+
+define float @fabs_f32(float %a) nounwind {
+; LA32F-LABEL: fabs_f32:
+; LA32F:       # %bb.0:
+; LA32F-NEXT:    fabs.s $fa0, $fa0
+; LA32F-NEXT:    ret
+;
+; LA32D-LABEL: fabs_f32:
+; LA32D:       # %bb.0:
+; LA32D-NEXT:    fabs.s $fa0, $fa0
+; LA32D-NEXT:    ret
+;
+; LA64F-LABEL: fabs_f32:
+; LA64F:       # %bb.0:
+; LA64F-NEXT:    fabs.s $fa0, $fa0
+; LA64F-NEXT:    ret
+;
+; LA64D-LABEL: fabs_f32:
+; LA64D:       # %bb.0:
+; LA64D-NEXT:    fabs.s $fa0, $fa0
+; LA64D-NEXT:    ret
+  %1 = call float @llvm.fabs.f32(float %a)
+  ret float %1
+}
+
+define double @fabs_f64(double %a) nounwind {
+; LA32F-LABEL: fabs_f64:
+; LA32F:       # %bb.0:
+; LA32F-NEXT:    bstrpick.w $a1, $a1, 30, 0
+; LA32F-NEXT:    ret
+;
+; LA32D-LABEL: fabs_f64:
+; LA32D:       # %bb.0:
+; LA32D-NEXT:    fabs.d $fa0, $fa0
+; LA32D-NEXT:    ret
+;
+; LA64F-LABEL: fabs_f64:
+; LA64F:       # %bb.0:
+; LA64F-NEXT:    bstrpick.d $a0, $a0, 62, 0
+; LA64F-NEXT:    ret
+;
+; LA64D-LABEL: fabs_f64:
+; LA64D:       # %bb.0:
+; LA64D-NEXT:    fabs.d $fa0, $fa0
+; LA64D-NEXT:    ret
+  %1 = call double @llvm.fabs.f64(double %a)
+  ret double %1
+}


        


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