[PATCH] D131932: Do not count identity copies for register allocation costs

[Matthias Braun via Phabricator via llvm-commits]

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We should not count `COPY`s between two virtual registers that end up using the same physical register. They will get removed in the `virtregmap` pass.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D131932

Files:
  llvm/lib/CodeGen/RegAllocGreedy.cpp
  llvm/test/CodeGen/X86/statepoint-ra.ll


Index: llvm/test/CodeGen/X86/statepoint-ra.ll
===================================================================
--- llvm/test/CodeGen/X86/statepoint-ra.ll
+++ llvm/test/CodeGen/X86/statepoint-ra.ll
@@ -20,10 +20,6 @@
 ;YAML:   - String:          ' total reloads cost '
 ;YAML:   - NumZeroCostFoldedReloads: '20'
 ;YAML:   - String:          ' zero cost folded reloads '
-;YAML:   - NumVRCopies:     '2'
-;YAML:   - String:          ' virtual registers copies '
-;YAML:   - TotalCopiesCost: '8.882868e-16'
-;YAML:   - String:          ' total copies cost '
 ;YAML:   - String:          generated in function
 
 define void @barney(ptr addrspace(1) %arg, double %arg1, double %arg2, double %arg3, double %arg4, double %arg5, double %arg6, double %arg7, double %arg8, double %arg9, double %arg10, double %arg11, double %arg12) gc "statepoint-example" personality ptr @widget {
Index: llvm/lib/CodeGen/RegAllocGreedy.cpp
===================================================================
--- llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -2372,8 +2372,16 @@
       MachineOperand &Dest = MI.getOperand(0);
       MachineOperand &Src = MI.getOperand(1);
       if (Dest.isReg() && Src.isReg() && Dest.getReg().isVirtual() &&
-          Src.getReg().isVirtual())
-        ++Stats.Copies;
+          Src.getReg().isVirtual()) {
+        MCRegister SrcReg = VRM->getPhys(Src.getReg());
+        if (Src.getSubReg())
+          SrcReg = TRI->getSubReg(SrcReg, Src.getSubReg());
+        MCRegister DestReg = VRM->getPhys(Dest.getReg());
+        if (Dest.getSubReg())
+          DestReg = TRI->getSubReg(DestReg, Dest.getSubReg());
+        if (SrcReg != DestReg)
+          ++Stats.Copies;
+      }
       continue;
     }
 


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