[PATCH] D131562: [AArch64][SME] Document SME ABI implementation in LLVM

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I agree a LangRef update makes sense if we're loosening the constraint that vscale is constant across the whole program.  Might need some adjustments to make various transforms work; in particular, I suspect GEP constant expressions involving vscale break.

Are aarch64_pstate_sm_compatible functions allowed to call arbitrary functions?  I guess there's some way to save/restore PSTATE.SM?



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Comment at: llvm/docs/AArch64SME.rst:278
+We also need this for locally streaming functions, where an ``SMSTART`` needs to
+be inserted into the DAG at the start of the function.
+
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Not sure the CopyToReg+CopyFromReg thing is actually enough to prevent all the transforms you want to prevent... if I'm following correctly, you really need to prevent *any* operations from showing up in the middle of the call sequence, and the SelectionDAG scheduler isn't really set up to enforce that sort of constraint.  Would be more obviously correct to use a pseduo-instruction for the call, and expand it to smstop+call+smstart using a post-isel hook.


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Comment at: llvm/docs/AArch64SME.rst:381
+The value of PSTATE.SM is not controlled by the feature flags, but rather by the
+function attributes. This means that we can compile for '``+sme``' and the compiler
+will code-generate any instructions, even if they are not legal under the requested
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You could use a feature flag that reflects the state of PSTATE.SM, but doesn't actually enable/disable any instructions.  But I guess that's basically the same thing as a function attribute.


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Comment at: llvm/docs/AArch64SME.rst:397
+``aarch64_pstate_sm_body`` or ``aarch64_pstate_sm_compatible`` attributes,
+in order to avoid the use of vector instructions.
+
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Disabling vectorization might not be enough to completely prevent the use of vector instructions,  but probably close enough.  (For example, we use vector instructions to lower popcount.)


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