[PATCH] D130769: [RISCV] Combine and remove redundant ADD/SUB instructions

[Elena Lepilkina via Phabricator via llvm-commits]

eklepilkina marked an inline comment as done.
eklepilkina added a comment.

> Can add/sub combine use instcombine? Adding a new pass seems to be expensive

I'm afraid that this is impossible because we can't cover all cases on LLVM IR. If you look at `llvm/test/CodeGen/RISCV/adds-combinations.ll` added in this review, you'll see that these add instructions appear on the late passes. On LLVM IR we can have different cases that can cause generation of such combination. And it seems to me it's hard to predict this on the step of `InstCombine`. If you have an idea what patterns should be matched in InstCombine, please, share .


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https://reviews.llvm.org/D130769