[llvm] 08a8805 - [X86] Add RDPRU instruction CPUID bit masks

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 11 08:07:53 PDT 2022


Author: Simon Pilgrim
Date: 2022-08-11T16:07:36+01:00
New Revision: 08a880509e4f7ca8d346dce42fe7528c3a33f22c

URL: https://github.com/llvm/llvm-project/commit/08a880509e4f7ca8d346dce42fe7528c3a33f22c
DIFF: https://github.com/llvm/llvm-project/commit/08a880509e4f7ca8d346dce42fe7528c3a33f22c.diff

LOG: [X86] Add RDPRU instruction CPUID bit masks

As mentioned on D128934 - we weren't including the CPUID bit handling for the RDPRU instruction

AMD's APMv3 (24594) lists it as CPUID Fn8000_0008_EBX Bit#4

Added: 
    

Modified: 
    clang/lib/Headers/cpuid.h
    llvm/lib/Support/Host.cpp

Removed: 
    


################################################################################
diff  --git a/clang/lib/Headers/cpuid.h b/clang/lib/Headers/cpuid.h
index 5d262a60735f2..caa0069c2e1fa 100644
--- a/clang/lib/Headers/cpuid.h
+++ b/clang/lib/Headers/cpuid.h
@@ -232,6 +232,7 @@
 
 /* Features in %ebx for leaf 0x80000008 */
 #define bit_CLZERO      0x00000001
+#define bit_RDPRU       0x00000010
 #define bit_WBNOINVD    0x00000200
 
 

diff  --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp
index 40d85924de41c..f67acd7416315 100644
--- a/llvm/lib/Support/Host.cpp
+++ b/llvm/lib/Support/Host.cpp
@@ -1734,6 +1734,7 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
   bool HasExtLeaf8 = MaxExtLevel >= 0x80000008 &&
                      !getX86CpuIDAndInfo(0x80000008, &EAX, &EBX, &ECX, &EDX);
   Features["clzero"]   = HasExtLeaf8 && ((EBX >> 0) & 1);
+  Features["rdpru"]    = HasExtLeaf8 && ((EBX >> 4) & 1);
   Features["wbnoinvd"] = HasExtLeaf8 && ((EBX >> 9) & 1);
 
   bool HasLeaf7 =


        


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