[llvm] 8986998 - [DAGCombine] Check zext legality in zext-extract-extend combine

Peter Waller via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 11 07:31:00 PDT 2022


Author: Peter Waller
Date: 2022-08-11T14:30:42Z
New Revision: 898699831b5490d88b993593e5cb415fb2d1983a

URL: https://github.com/llvm/llvm-project/commit/898699831b5490d88b993593e5cb415fb2d1983a
DIFF: https://github.com/llvm/llvm-project/commit/898699831b5490d88b993593e5cb415fb2d1983a.diff

LOG: [DAGCombine] Check zext legality in zext-extract-extend combine

Discussed in D131503.

Fix to D130782.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 392b24af37166..17451b40f7502 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -6378,7 +6378,8 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
     SDValue Extendee = Ext->getOperand(0);
 
     unsigned ScalarWidth = Extendee.getValueType().getScalarSizeInBits();
-    if (N1C->getAPIntValue().isMask(ScalarWidth)) {
+    if (N1C->getAPIntValue().isMask(ScalarWidth) &&
+        (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, ExtVT))) {
       //    (and (extract_subvector (zext|anyext|sext v) _) iN_mask)
       // => (extract_subvector (iN_zeroext v))
       SDValue ZeroExtExtendee =


        


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