[llvm] 57de4e0 - [TypePromotion] Don't insert Truncate for a no-op ZExt

Andre Vieira via llvm-commits llvm-commits at lists.llvm.org
Thu Aug 11 01:50:23 PDT 2022


Author: Andre Vieira
Date: 2022-08-11T09:50:10+01:00
New Revision: 57de4e059ddcf97aa7cf22b1a94a018c66579f64

URL: https://github.com/llvm/llvm-project/commit/57de4e059ddcf97aa7cf22b1a94a018c66579f64
DIFF: https://github.com/llvm/llvm-project/commit/57de4e059ddcf97aa7cf22b1a94a018c66579f64.diff

LOG: [TypePromotion] Don't insert Truncate for a no-op ZExt

Differential Revision: https://reviews.llvm.org/D131487

Added: 
    

Modified: 
    llvm/lib/CodeGen/TypePromotion.cpp
    llvm/test/Transforms/TypePromotion/AArch64/phi-zext-gep.ll
    llvm/test/Transforms/TypePromotion/ARM/calls.ll
    llvm/test/Transforms/TypePromotion/ARM/casts.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/TypePromotion.cpp b/llvm/lib/CodeGen/TypePromotion.cpp
index 8dc8d381ad166..0690fadab7eb7 100644
--- a/llvm/lib/CodeGen/TypePromotion.cpp
+++ b/llvm/lib/CodeGen/TypePromotion.cpp
@@ -551,8 +551,13 @@ void IRPromoter::TruncateSinks() {
     }
 
     // Don't insert a trunc for a zext which can still legally promote.
+    // Nor insert a trunc when the input value to that trunc has the same width
+    // as the zext we are inserting it for.  When this happens the input operand
+    // for the zext will be promoted to the same width as the zext's return type
+    // rendering that zext unnecessary.  This zext gets removed before the end
+    // of the pass.
     if (auto ZExt = dyn_cast<ZExtInst>(I))
-      if (ZExt->getType()->getScalarSizeInBits() > PromotedWidth)
+      if (ZExt->getType()->getScalarSizeInBits() >= PromotedWidth)
         continue;
 
     // Now handle the others.

diff  --git a/llvm/test/Transforms/TypePromotion/AArch64/phi-zext-gep.ll b/llvm/test/Transforms/TypePromotion/AArch64/phi-zext-gep.ll
index 9c2da5a49a1b6..b24e4a10b69d1 100644
--- a/llvm/test/Transforms/TypePromotion/AArch64/phi-zext-gep.ll
+++ b/llvm/test/Transforms/TypePromotion/AArch64/phi-zext-gep.ll
@@ -24,7 +24,6 @@ define dso_local i32 @avoid_trunc_gep(i8* nocapture readonly %ip) {
 ; CHECK-NEXT:    br label [[FOR_END]]
 ; CHECK:       for.end:
 ; CHECK-NEXT:    [[TAG_0_IN_LCSSA:%.*]] = phi i32 [ [[TMP0]], [[ENTRY:%.*]] ], [ [[TMP1]], [[FOR_END_LOOPEXIT]] ]
-; CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TAG_0_IN_LCSSA]] to i8
 ; CHECK-NEXT:    ret i32 [[TAG_0_IN_LCSSA]]
 ;
 entry:

diff  --git a/llvm/test/Transforms/TypePromotion/ARM/calls.ll b/llvm/test/Transforms/TypePromotion/ARM/calls.ll
index 9b140b029beeb..8abaa0c6646e3 100644
--- a/llvm/test/Transforms/TypePromotion/ARM/calls.ll
+++ b/llvm/test/Transforms/TypePromotion/ARM/calls.ll
@@ -216,12 +216,11 @@ define i32 @check_zext_phi_call_arg() {
 ; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp eq i32 [[D_SROA_0_0]], 0
 ; CHECK-NEXT:    br i1 [[TOBOOL]], label [[FOR_COND_BACKEDGE]], label [[IF_THEN:%.*]]
 ; CHECK:       for.cond.backedge:
-; CHECK-NEXT:    [[D_SROA_0_0_BE]] = phi i32 [ [[TMP1:%.*]], [[IF_THEN]] ], [ 0, [[FOR_COND]] ]
+; CHECK-NEXT:    [[D_SROA_0_0_BE]] = phi i32 [ [[TMP0:%.*]], [[IF_THEN]] ], [ 0, [[FOR_COND]] ]
 ; CHECK-NEXT:    br label [[FOR_COND]]
 ; CHECK:       if.then:
-; CHECK-NEXT:    [[TMP0:%.*]] = trunc i32 [[D_SROA_0_0]] to i16
 ; CHECK-NEXT:    [[CALL:%.*]] = tail call zeroext i16 bitcast (i16 (...)* @f to i16 (i32)*)(i32 [[D_SROA_0_0]])
-; CHECK-NEXT:    [[TMP1]] = zext i16 [[CALL]] to i32
+; CHECK-NEXT:    [[TMP0]] = zext i16 [[CALL]] to i32
 ; CHECK-NEXT:    br label [[FOR_COND_BACKEDGE]]
 ;
 entry:

diff  --git a/llvm/test/Transforms/TypePromotion/ARM/casts.ll b/llvm/test/Transforms/TypePromotion/ARM/casts.ll
index 34a519fa64d60..e7b340afd746a 100644
--- a/llvm/test/Transforms/TypePromotion/ARM/casts.ll
+++ b/llvm/test/Transforms/TypePromotion/ARM/casts.ll
@@ -339,16 +339,15 @@ define i8* @two_stage_zext_trunc_mix(i32* %this, i32 %__pos1, i32 %__n1, i32** %
 ; CHECK-NEXT:    [[CAST:%.*]] = bitcast i32** [[__SIZE__I5_I_I]] to i32*
 ; CHECK-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CAST]], align 4
 ; CHECK-NEXT:    [[TMP4:%.*]] = lshr i32 [[TMP1]], 1
-; CHECK-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
 ; CHECK-NEXT:    [[COND_I_I:%.*]] = select i1 [[TOBOOL_I_I_I_I]], i32 [[TMP4]], i32 [[TMP3]]
 ; CHECK-NEXT:    [[__SIZE__I_I_I_I_I:%.*]] = bitcast i32* [[THIS:%.*]] to i8*
-; CHECK-NEXT:    [[TMP6:%.*]] = load i8, i8* [[__SIZE__I_I_I_I_I]], align 4
-; CHECK-NEXT:    [[TMP7:%.*]] = zext i8 [[TMP6]] to i32
-; CHECK-NEXT:    [[TMP8:%.*]] = and i32 [[TMP7]], 1
-; CHECK-NEXT:    [[TOBOOL_I_I_I_I_I:%.*]] = icmp eq i32 [[TMP8]], 0
-; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i8, i8* [[__SIZE__I_I_I_I]], i32 [[__POS1:%.*]]
-; CHECK-NEXT:    [[TMP10:%.*]] = getelementptr inbounds i8, i8* [[__SIZE__I_I_I_I]], i32 [[__POS2:%.*]]
-; CHECK-NEXT:    [[RES:%.*]] = select i1 [[TOBOOL_I_I_I_I_I]], i8* [[TMP9]], i8* [[TMP10]]
+; CHECK-NEXT:    [[TMP5:%.*]] = load i8, i8* [[__SIZE__I_I_I_I_I]], align 4
+; CHECK-NEXT:    [[TMP6:%.*]] = zext i8 [[TMP5]] to i32
+; CHECK-NEXT:    [[TMP7:%.*]] = and i32 [[TMP6]], 1
+; CHECK-NEXT:    [[TOBOOL_I_I_I_I_I:%.*]] = icmp eq i32 [[TMP7]], 0
+; CHECK-NEXT:    [[TMP8:%.*]] = getelementptr inbounds i8, i8* [[__SIZE__I_I_I_I]], i32 [[__POS1:%.*]]
+; CHECK-NEXT:    [[TMP9:%.*]] = getelementptr inbounds i8, i8* [[__SIZE__I_I_I_I]], i32 [[__POS2:%.*]]
+; CHECK-NEXT:    [[RES:%.*]] = select i1 [[TOBOOL_I_I_I_I_I]], i8* [[TMP8]], i8* [[TMP9]]
 ; CHECK-NEXT:    ret i8* [[RES]]
 ;
 entry:
@@ -1009,7 +1008,6 @@ define i32 @dont_return_inserted_trunc(i16* %a, i8* %b) {
 ; CHECK-NEXT:    [[OR:%.*]] = or i32 [[TMP4]], [[TMP2]]
 ; CHECK-NEXT:    [[TMP5:%.*]] = trunc i32 [[OR]] to i8
 ; CHECK-NEXT:    store i8 [[TMP5]], i8* [[B]], align 1
-; CHECK-NEXT:    [[TMP6:%.*]] = trunc i32 [[OR]] to i8
 ; CHECK-NEXT:    ret i32 [[OR]]
 ;
 entry:
@@ -1035,7 +1033,6 @@ define i32 @replace_trunk_with_mask(i16* %a) {
 ; CHECK-NEXT:    [[TMP2:%.*]] = urem i32 535, [[TMP1]]
 ; CHECK-NEXT:    [[TMP3:%.*]] = and i32 [[TMP2]], 255
 ; CHECK-NEXT:    [[TMP4:%.*]] = udiv i32 [[TMP3]], 3
-; CHECK-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
 ; CHECK-NEXT:    br label [[COND_END]]
 ; CHECK:       cond.end:
 ; CHECK-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP4]], [[COND_FALSE]] ], [ 0, [[ENTRY:%.*]] ]


        


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