[PATCH] D131508: [WIP][RISCV] Enable fixed length vectorization

Philip Reames via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Aug 9 09:55:21 PDT 2022


reames added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/fold-vector-cmp.ll:13
+;
+; CHECK-V-LABEL: test:
+; CHECK-V:       # %bb.0:
----------------
This case demonstrates an unfortunate, but I think non-blocking interaction.  Essentially, with vectors illegal, we force scalarization and then constant fold the individual scalar lanes.  With vectors legal, we fail to recognize that scalarization is profitable, or that lane 0 is unused.  As a result, we fail to constant fold.  This is a general problem with vector codegen optimization, and not directly related to this change.  


================
Comment at: llvm/test/CodeGen/RISCV/vec3-setcc-crash.ll:2
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \
 ; RUN:     | FileCheck %s --check-prefix=RV32
----------------
TODO: This test needs to be restricted to continue exercising scalar lowering.  


================
Comment at: llvm/test/Transforms/LoopVectorize/RISCV/inloop-reduction.ll:85
 ; INLOOP:       for.body.preheader:
-; INLOOP-NEXT:    [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
-; INLOOP-NEXT:    [[TMP1:%.*]] = mul i32 [[TMP0]], 8
-; INLOOP-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], [[TMP1]]
+; INLOOP-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N]], 16
 ; INLOOP-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
----------------
TODO: We're deciding that fixed length vectorization is profitable over scalable vectorization when both are legal.  That's odd, and probably indicates a problem in the cost model.  


================
Comment at: llvm/test/Transforms/LoopVectorize/RISCV/scalable-basics.ll:331
+; VLENUNK:       vector.body:
+; VLENUNK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; VLENUNK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0
----------------
This is an example of fallback logic working as expected.

(We have a known problem around scalable scatter/gather costing.)


================
Comment at: llvm/test/Transforms/LoopVectorize/RISCV/scalable-divrem.ll:252
 ; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
+; CHECK:       vector.ph:
----------------
Again, fallback working as expected due to known problem with scalable vectorization.  


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131508/new/

https://reviews.llvm.org/D131508



More information about the llvm-commits mailing list