[PATCH] D131478: AMDGPU: mbcnt allow for non-zero src1 for known-bits

[David Stuttard via Phabricator via llvm-commits]

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Src1 for mbcnt can be a non-zero literal or register. Take this into account
when calculating known bits.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D131478

Files:
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mbcnt.ll

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