[PATCH] D131358: [X86] (0 - SetCC) | C -> (zext (not SetCC)) * (C + 1) - 1 if we can get a LEA out of it.
Amaury SECHET via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Aug 8 15:26:24 PDT 2022
deadalnix added inline comments.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:48439
+ if (N0.getOpcode() == ISD::SUB && N0.hasOneUse() &&
+ isNullConstant(N0.getOperand(0))) {
+ SDValue Cond = N0.getOperand(1);
----------------
RKSimon wrote:
> Limit this to legal i32/i64 cases? Add test coverage for other types as well.
That make sense.
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:48455
+ SDValue R = DAG.getZExtOrTrunc(NotCond, dl, VT);
+ R = DAG.getNode(ISD::MUL, dl, VT, R, DAG.getConstant(Scale, dl, VT));
+ R = DAG.getNode(ISD::SUB, dl, VT, R, DAG.getConstant(1, dl, VT));
----------------
RKSimon wrote:
> Not sure if we should use X86ISD::MUL_IMM here?
combineSelectOfTwoContants uses a mul, so I did the same.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D131358/new/
https://reviews.llvm.org/D131358
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