[PATCH] D130993: [AArch64][SVE] Extend LD1RQ ISel patterns to cover missing addressing modes

[Matt Devereau via Phabricator via llvm-commits]

MattDevereau updated this revision to Diff 450842.
MattDevereau added a comment.
Herald added a subscriber: gbedwell.
Herald added a reviewer: andreadb.

Accepting changes to N2-sve-instructions.s as valid


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130993/new/

https://reviews.llvm.org/D130993

Files:
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/lib/Target/AArch64/SVEInstrFormats.td
  llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
  llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-sve-instructions.s

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D130993.450842.patch
Type: text/x-patch
Size: 25495 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220808/364c23d9/attachment.bin>