[PATCH] D131352: [LoongArch] Add codegen support for bswap

WÁNG Xuěruì via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Aug 7 19:04:06 PDT 2022


xen0n added inline comments.


================
Comment at: llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp:68
 
+  // LA32 does not natively support any of the bswap ops.
+  if (Subtarget.is64Bit()) {
----------------
SixWeining wrote:
> As [[ https://github.com/loongson/LoongArch-Documentation/blob/main/docs/LoongArch-Vol1-EN/basic-integer-instructions/overview-of-basic-integer-instructions.adoc#overview-of-basic-integer-instructions | Table 1 ]] described, `revb.2h` is available on LA32.
> So for `i16`, we can use it.
I looked at the original document《龙芯架构 32 位精简版参考手册》 which doesn't contain this instruction, maybe it's because it's actually describing the LA32 Primary ISA? But apparently it described way more instructions than the tiny subset suitable for university courses.

I'll change anyway. Thanks for the fact checking.


================
Comment at: llvm/test/CodeGen/LoongArch/bswap.ll:33-39
+; LA32-NEXT:    srli.w $a1, $a0, 16
+; LA32-NEXT:    srli.w $a2, $a0, 24
+; LA32-NEXT:    bstrins.w $a2, $a1, 15, 8
+; LA32-NEXT:    bstrpick.w $a1, $a0, 23, 8
+; LA32-NEXT:    slli.w $a0, $a0, 24
+; LA32-NEXT:    bstrins.w $a0, $a1, 23, 16
+; LA32-NEXT:    or $a0, $a0, $a2
----------------
SixWeining wrote:
> How about:
> 
> ```
> revb.2h $a0, $a0
> rotri.w $a0, 16
> ```
As `revb.2h` can be used in this case, I'll change this. Thanks.


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https://reviews.llvm.org/D131352



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