[PATCH] D131260: [DAG] select Cond, -1, C --> or (sext Cond), C if Cond is MVT::i1
    Amaury SECHET via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Sat Aug  6 19:05:04 PDT 2022
    
    
  
deadalnix added inline comments.
================
Comment at: llvm/test/CodeGen/X86/select_const.ll:289
+; CHECK-NEXT:    negl %eax
+; CHECK-NEXT:    orl $3, %eax
 ; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
----------------
deadalnix wrote:
> TODO: (sext Cond) | (Pow2 - 1) -> Pow2 - (zext (not Cond)) ?
> 
> Maybe if inverting Cond if for free? Is there a way to check for this?
> 
> Or maybe this is best reserved for `X86DAGToDAGISel::matchAddressRecursively`?
I meant (sext Cond) | (Pow2 - 1) -> (zext (not Cond)) * Pow2 - 1 ?
Repository:
  rG LLVM Github Monorepo
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  https://reviews.llvm.org/D131260/new/
https://reviews.llvm.org/D131260
    
    
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