[PATCH] D131246: [AMDGPU] SIFixSGPRCopies refactoring

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:637
+        if (isSGPRToVGPRCopy(SrcRC, DstRC, *TRI) &&
+            // Since VGPR to SGPR copies affect VGPR to SGPR copiy
+            // scoreand,hence the lowering decision, let's try to get rid of
----------------
Typo "copiy", "scoreand,hence".


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:771
+    // Check if it is still valid
+    if (nullptr != MI->getParent() && MI->isRegSequence())
+      foldVGPRCopyIntoRegSequence(*MI, TRI, TII, *MRI);
----------------
Just `MI->getParent()`


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:1064
+    // May be lowered out
+    if (nullptr == MI->getParent())
+      continue;
----------------
Just `!MI->getParent()`


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:1086
+          .addReg(SCCCopy);
+      MI->eraseFromParent();
+    } else if (DstReg == AMDGPU::SCC) {
----------------
Early return here and no else.


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:1100
+}
\ No newline at end of file

----------------
New line.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D131246/new/

https://reviews.llvm.org/D131246