[PATCH] D130947: TableGen: Introduce generated getSubRegisterClass function
    Matt Arsenault via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Fri Aug  5 09:00:48 PDT 2022
    
    
  
arsenm updated this revision to Diff 450306.
arsenm added a comment.
Address comments and cleanups
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D130947/new/
https://reviews.llvm.org/D130947
Files:
  llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
  llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  llvm/lib/Target/AMDGPU/SIRegisterInfo.h
  llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
  llvm/utils/TableGen/RegisterInfoEmitter.cpp
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