[PATCH] D131260: [DAG] select Cond, C, -1 --> or (sext Cond), C if Cond is MVT::i1

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix added inline comments.


================
Comment at: llvm/test/CodeGen/X86/memcmp-more-load-pairs-x32.ll:163
 ; X86-NEXT:  .LBB9_3: # %res_block
-; X86-NEXT:    setae %al
-; X86-NEXT:    movzbl %al, %eax
-; X86-NEXT:    leal -1(%eax,%eax), %eax
+; X86-NEXT:    xorl %eax, %eax
+; X86-NEXT:    cmpw %si, %dx
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pengfei wrote:
> deadalnix wrote:
> > This seems to be unnecessary.
> Looks like dependency breaking for sbb:
> https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp#L5874-L5876
Good catch, thanks.


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https://reviews.llvm.org/D131260