[PATCH] D131028: [AArch64] Fix cost model for FADD vector reduction

[Florian Hahn via Phabricator via llvm-commits]

fhahn added a comment.

In D131028#3698795 <https://reviews.llvm.org/D131028#3698795>, @dmgreen wrote:

> I think the new costs are a lot better, but I worry about the implications of setting the fadd reduction costs. The SLP vectorizer will be the main user and whilst they might be correct in isolation, I worry about the comparative cost vs scalar fma. D125987 <https://reviews.llvm.org/D125987> for example was trying to fix the same thing.

Yeah this is an unfortunate potential impact on the SLP vectorizer :(

I doubt the improved costs here should make things *much* worse in practice and we already have the same issue with integer `add` reduction and `mla` IIUC.  Should any negative impact materialize, I think we should work around an SLP issue in the SLPVectorizer directly, rather than through artificially inflating costs in TTI.

It might also increase the incentives to properly addressing the issue :)

The motivating use case for those improvements is using more accurate costs in other passes, like D131125 <https://reviews.llvm.org/D131125>


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