[PATCH] D131117: [X86] Teach PostprocessISelDAG to fold ANDrm+TESTrr when chain result is used.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Aug 3 19:51:36 PDT 2022


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:1507
+           N0Opc == X86::AND32rm || N0Opc == X86::AND64rm) &&
+          !And->hasAnyUseOfValue(1)) {
         unsigned NewOpc;
----------------
LuoYuanke wrote:
> Is the EFLAGS of `AND32rm` the same to the EFLAGS produced by `TEST32mr`?
That's not quite the right question to ask because the EFLAGS of AND32rm were never used.

The question to ask is does TEST32mr have the same EFLAGs as a TEST32rr of the AND32rm result register. Remember that the TEST32rr is doing an AND of the input with itself.

They both internally do an AND and discard the result, but keep the flags which are calculated form the result. For TEST32mr this result will computed by ANDing the two inputs from the original AND32rm. For the TEST32rr it will AND a value with itself so the resulting values is just whatever original AND32rm computed. So for both TEST instruction this result value is the same.

Let's look at each of the 6 flags
C - both set to 0
O - both set to 0
S - set to the sign bit of the result of the internal AND. Both produce the same result so the flag is the same
P - set based on the parity of the lower 8 bits of the result of the internal AND. Both produce the same result so the flag is the same
A - undefined and the compiler never uses it anyway
Z - set if the result of the internal AND is zero. Both produce the same result so the flag is the same


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  https://reviews.llvm.org/D131117/new/

https://reviews.llvm.org/D131117



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