[PATCH] D131003: [TableGen][CodeEmitterGen] Add the capability to match sub-operands by name.

[James Y Knight via Phabricator via llvm-commits]

jyknight created this revision.
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I'm not super-happy with the syntax for this...suggestions welcome.

Use the new capability to allow ARM and AArch64 to no longer require
any positional operand matching.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D131003

Files:
  llvm/lib/Target/AArch64/AArch64InstrFormats.td
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/utils/TableGen/CodeEmitterGen.cpp

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