[llvm] 85a6dd5 - [MIPS] Expose the ZERO register as a constant physical register

[Guozhi Wei via llvm-commits]

Author: Guozhi Wei
Date: 2022-08-02T17:04:52Z
New Revision: 85a6dd50adb22207a67619ff4fedcc4f48d021cb

URL: https://github.com/llvm/llvm-project/commit/85a6dd50adb22207a67619ff4fedcc4f48d021cb
DIFF: https://github.com/llvm/llvm-project/commit/85a6dd50adb22207a67619ff4fedcc4f48d021cb.diff

LOG: [MIPS] Expose the ZERO register as a constant physical register

The ZERO register should be exposed as a constant physical register through the interface TargetRegisterInfo::isConstantPhysReg.

Differential Revision: https://reviews.llvm.org/D130932

Added: 
    

Modified: 
    llvm/lib/Target/Mips/MipsRegisterInfo.cpp
    llvm/lib/Target/Mips/MipsRegisterInfo.h

Removed: 
    


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diff  --git a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
index 390ab9d22024b..6aa5610f7c74a 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -318,3 +318,7 @@ bool MipsRegisterInfo::canRealignStack(const MachineFunction &MF) const {
   // sized objects.
   return MF.getRegInfo().canReserveReg(BP);
 }
+
+bool MipsRegisterInfo::isConstantPhysReg(MCRegister PhysReg) const {
+  return PhysReg == Mips::ZERO_64 || PhysReg == Mips::ZERO;
+}

diff  --git a/llvm/lib/Target/Mips/MipsRegisterInfo.h b/llvm/lib/Target/Mips/MipsRegisterInfo.h
index 06f214c2d6b12..1f45f6abf8c82 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.h
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.h
@@ -69,6 +69,8 @@ class MipsRegisterInfo : public MipsGenRegisterInfo {
   /// Debug information queries.
   Register getFrameRegister(const MachineFunction &MF) const override;
 
+  bool isConstantPhysReg(MCRegister PhysReg) const override;
+
   /// Return GPR register class.
   virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;