[PATCH] D130258: [AMDGPU] Remove IR SpeculativeExecution pass from codegen pipeline

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

Ping! I think this is close to being a no-brainer. All SpeculativeExecution does is to hoist some instructions, and virtually all of them are later sunk by the IR code sinking pass.

> I've looked at the effect of this patch on our corpus of 10000 graphics shaders (compiled for gfx1030 using a frontend that includes CodeSinking in the IR optimization pipeline).

I redid this analysis and the effect is even smaller than I thought. Only 1 of the 10000 pipelines is affected, and the instruction frequency delta (out of ~900 instructions in that pipeline) is:

  2 15291 15293 v_mul_lo_u32
  -2 6442 6440 v_or_b32
  -1 44265 44264 v_add_nc_u32


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D130258/new/

https://reviews.llvm.org/D130258