[PATCH] D130989: [AMDGPU][MC][GFX11] Correct v_dot2_f16_f16 and v_dot2_bf16_bf16

[Dmitry Preobrazhensky via Phabricator via llvm-commits]

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Enable SGPRs for the following operands of these opcodes:

- src operands of VOP3 variant.
- src2 operand of DPP variants.

See this bug <https://github.com/llvm/llvm-project/issues/56861> for more information.


https://reviews.llvm.org/D130989

Files:
  llvm/lib/Target/AMDGPU/VOP3Instructions.td
  llvm/test/MC/AMDGPU/gfx11_asm_dpp16.s
  llvm/test/MC/AMDGPU/gfx11_asm_dpp8.s
  llvm/test/MC/AMDGPU/gfx11_vop123.s
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_all.txt
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
  llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8.txt

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