[PATCH] D128911: Emit table lookup from TargetLowering::expandCTTZ()

Shubham Narlawar via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 1 23:34:14 PDT 2022


gsocshubham added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:7986
+  Align Alignment = cast<ConstantPoolSDNode>(CPIdx)->getAlign();
+  SDValue Load = DAG.getLoad(
+      VT, dl, DAG.getEntryNode(),
----------------
craig.topper wrote:
> gsocshubham wrote:
> > craig.topper wrote:
> > > What happens if you always create a zextload even if the type isn't legal?
> > There is no change in generated code nor in LIT test failures as it was originally submitted earlier.
> A zext load with i8 memVT?
Zext eith memVt without checking VT type legality for `llvm.cttz.i32(i32 %x, i1 true)` compiled with SPARC gives -

```
f:                                      ! @f
        .cfi_startproc
! %bb.0:                                ! %entry
        mov     %o0, %o1
        cmp %o0, 0
        be      .LBB0_2
        mov     %g0, %o0
! %bb.1:                                ! %entry
        sub %o0, %o1, %o0
        and %o1, %o0, %o0
        sethi 122669, %o1
        or %o1, 305, %o1
        smul %o0, %o1, %o0
        srl %o0, 27, %o0
        sethi %hi(.LCPI0_0), %o1
        add %o1, %lo(.LCPI0_0), %o1
        ld [%o1+%o0], %o0

```


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128911/new/

https://reviews.llvm.org/D128911



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