[PATCH] D128073: [SROA] Try harder to find a vector promotion viable type when rewriting

Vang Thao via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 1 13:49:14 PDT 2022


vangthao added inline comments.


================
Comment at: llvm/test/Transforms/SROA/sroa-common-type-fail-promotion.ll:338-342
+; CHECK-NEXT:    [[B_BLOCKWISE_COPY_SROA_0:%.*]] = alloca float, align 16
+; CHECK-NEXT:    [[B_BLOCKWISE_COPY_SROA_4:%.*]] = alloca float, align 4
+; CHECK-NEXT:    [[B_BLOCKWISE_COPY_SROA_7:%.*]] = alloca float, align 8
+; CHECK-NEXT:    [[B_BLOCKWISE_COPY_SROA_10:%.*]] = alloca float, align 4
+; CHECK-NEXT:    [[B_BLOCKWISE_COPY_SROA_13:%.*]] = alloca <8 x half>, align 16
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arsenm wrote:
> I'm not seeing why these allocas were not eliminated
My change only works if there is a common type found and that common type happens to be a vectortype. In the other tests the common vectortype was found from a `store <4 x float> ...` instruction. If we remove such instruction then there is no common vectortype and my changes to look at the original allocated type and vector promotion check is not enabled.

>From what I have observed, SROA fails to promote these allocas because it found common slicety of float while there are load halfs. This causes some offset issues and failure to promote when `visitLoadInst()` is called. If we change float type to half type by adjusting the stores to also be half type then we would have no issue promoting the allocas.


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https://reviews.llvm.org/D128073



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