[PATCH] D126661: [MachineVerifier] Fix crash on early clobbered subreg operands.

[Daniil Fukalov via Phabricator via llvm-commits]

dfukalov updated this revision to Diff 449097.
dfukalov added a comment.

Using pipeliner instead of RC as dummy pass.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D126661/new/

https://reviews.llvm.org/D126661

Files:
  llvm/lib/CodeGen/MachineVerifier.cpp
  llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir


Index: llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir
===================================================================
--- /dev/null
+++ llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir
@@ -0,0 +1,31 @@
+# RUN: llc -mtriple amdgcn-amd-amdhsa -run-pass=liveintervals,pipeliner -verify-machineinstrs -o - %s | FileCheck %s
+# REQUIRES: amdgpu-registered-target
+
+# This test checks that the verifier doesn't crash on early clobbered subreg arguments.
+
+---
+name:            sub0
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0_vgpr1
+
+    ; CHECK-NOT: *** Bad machine code: Inconsistent valno->def ***
+    INLINEASM &"", 0 /* attdialect */,  1835019 /* regdef-ec:VGPR_32 */, def undef early-clobber %0.sub0:vreg_64, 1835018 /* regdef:VGPR_32 */, def undef %0.sub1:vreg_64
+    FLAT_STORE_DWORDX2 $vgpr0_vgpr1, %0, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
+    S_ENDPGM 0
+
+...
+---
+name:            sub1
+tracksRegLiveness: true
+body:             |
+  bb.0:
+    liveins: $vgpr0_vgpr1
+
+    ; CHECK-NOT: *** Bad machine code: Inconsistent valno->def ***
+    INLINEASM &"", 0 /* attdialect */, 1835018 /* regdef:VGPR_32 */, def undef %0.sub0:vreg_64, 1835019 /* regdef-ec:VGPR_32 */, def undef early-clobber %0.sub1:vreg_64
+    FLAT_STORE_DWORDX2 $vgpr0_vgpr1, %0, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
+    S_ENDPGM 0
+
+...
Index: llvm/lib/CodeGen/MachineVerifier.cpp
===================================================================
--- llvm/lib/CodeGen/MachineVerifier.cpp
+++ llvm/lib/CodeGen/MachineVerifier.cpp
@@ -2435,7 +2435,9 @@
       DefIdx = DefIdx.getRegSlot(MO->isEarlyClobber());
 
       if (Reg.isVirtual()) {
-        checkLivenessAtDef(MO, MONum, DefIdx, *LI, Reg);
+        // Do not call for subreg operands.
+        if (SubRegIdx == 0)
+          checkLivenessAtDef(MO, MONum, DefIdx, *LI, Reg);
 
         if (LI->hasSubRanges()) {
           LaneBitmask MOMask = SubRegIdx != 0


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