[llvm] ddb6c28 - Avoid comparison of integers of different signs

[Marius Brehler via llvm-commits]

Author: Marius Brehler
Date: 2022-08-01T11:20:41Z
New Revision: ddb6c28638f9d34539cf2ffdb038483aa459905c

URL: https://github.com/llvm/llvm-project/commit/ddb6c28638f9d34539cf2ffdb038483aa459905c
DIFF: https://github.com/llvm/llvm-project/commit/ddb6c28638f9d34539cf2ffdb038483aa459905c.diff

LOG: Avoid comparison of integers of different signs

Otherwiese a warning is emitted when compiling with `-Wsign-compare`.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 82b89ab4b109..2d6e0e836710 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -19636,14 +19636,14 @@ SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) {
     // See if we can fill in the missing constant elements as zeros.
     // TODO: Should we do this for any constant?
     APInt DemandedZeroElts = APInt::getZero(NumElts);
-    for (int I = 0; I != NumElts; ++I)
+    for (unsigned I = 0; I != NumElts; ++I)
       if (!Ops[I])
         DemandedZeroElts.setBit(I);
 
     if (DAG.MaskedVectorIsZero(InVec, DemandedZeroElts)) {
       SDValue Zero = VT.isInteger() ? DAG.getConstant(0, DL, MaxEltVT)
                                     : DAG.getConstantFP(0, DL, MaxEltVT);
-      for (int I = 0; I != NumElts; ++I)
+      for (unsigned I = 0; I != NumElts; ++I)
         if (!Ops[I])
           Ops[I] = Zero;