[PATCH] D130874: [AArch64] Fold Mul(And(Srl(X, 15), 0x10001), 0xffff) to CMLTz

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: SjoerdMeijer, samtebbs, bipmis, fhahn.
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This folds a v4i32 Mul(And(Srl(X, 15), 0x10001), 0xffff) into a v8i16 CMLTz instruction. The Srl and And extract the top bit (whether the input is negative) and the Mul sets all values in the i16 half to all 1/0 depending on if that top bit was set. This is equivalent to a v8i16 CMLTz instruction. The same applies to other sizes with equivalent constants.


https://reviews.llvm.org/D130874

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/insert-extend.ll
  llvm/test/CodeGen/AArch64/mulcmle.ll
  llvm/test/CodeGen/AArch64/reduce-shuffle.ll

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