[llvm] 383bc72 - [RISCV] Precommit test for D123265
Luís Marques via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 29 15:14:03 PDT 2022
Author: Luís Marques
Date: 2022-07-30T00:13:42+02:00
New Revision: 383bc7210e5a48e86adc1f3a6bf4d27f95a6287a
URL: https://github.com/llvm/llvm-project/commit/383bc7210e5a48e86adc1f3a6bf4d27f95a6287a
DIFF: https://github.com/llvm/llvm-project/commit/383bc7210e5a48e86adc1f3a6bf4d27f95a6287a.diff
LOG: [RISCV] Precommit test for D123265
Differential Revision: https://reviews.llvm.org/D128562
Added:
Modified:
llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll b/llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
index b3e0ae32c399..25c232d48978 100644
--- a/llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
+++ b/llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
@@ -1,8 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV32I %s
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs -code-model=medium < %s \
+; RUN: | FileCheck -check-prefix=RV32I-MEDIUM %s
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV64I %s
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs -code-model=medium < %s \
+; RUN: | FileCheck -check-prefix=RV64I-MEDIUM %s
; We can often fold an ADDI into the offset of load/store instructions:
; (load (addi base, off1), off2) -> (load base, off1+off2)
@@ -26,11 +30,30 @@ define dso_local i64 @load_g_0() nounwind {
; RV32I-NEXT: lw a1, %lo(g_0+4)(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_g_0:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB0_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_0)
+; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB0_1)
+; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
+; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_g_0:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(g_0)
; RV64I-NEXT: ld a0, %lo(g_0)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_g_0:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB0_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_0)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
+; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* @g_0
ret i64 %0
@@ -45,11 +68,30 @@ define dso_local i64 @load_g_1() nounwind {
; RV32I-NEXT: lw a1, 4(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_g_1:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB1_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_1)
+; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB1_1)
+; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
+; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_g_1:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(g_1)
; RV64I-NEXT: ld a0, %lo(g_1)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_g_1:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB1_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_1)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB1_1)
+; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* @g_1
ret i64 %0
@@ -64,11 +106,30 @@ define dso_local i64 @load_g_2() nounwind {
; RV32I-NEXT: lw a1, 4(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_g_2:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB2_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_2)
+; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB2_1)
+; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
+; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_g_2:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(g_2)
; RV64I-NEXT: ld a0, %lo(g_2)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_g_2:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB2_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_2)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB2_1)
+; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* @g_2
ret i64 %0
@@ -83,11 +144,30 @@ define dso_local i64 @load_g_4() nounwind {
; RV32I-NEXT: lw a1, 4(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_g_4:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB3_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_4)
+; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB3_1)
+; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
+; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_g_4:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(g_4)
; RV64I-NEXT: ld a0, %lo(g_4)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_g_4:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB3_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB3_1)
+; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* @g_4
ret i64 %0
@@ -101,11 +181,30 @@ define dso_local i64 @load_g_8() nounwind {
; RV32I-NEXT: lw a1, %lo(g_8+4)(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_g_8:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB4_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_8)
+; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB4_1)
+; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
+; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_g_8:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(g_8)
; RV64I-NEXT: ld a0, %lo(g_8)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_g_8:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB4_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_8)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB4_1)
+; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* @g_8
ret i64 %0
@@ -119,11 +218,30 @@ define dso_local i64 @load_g_16() nounwind {
; RV32I-NEXT: lw a1, %lo(g_16+4)(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_g_16:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB5_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(g_16)
+; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB5_1)
+; RV32I-MEDIUM-NEXT: lw a0, 0(a1)
+; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_g_16:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(g_16)
; RV64I-NEXT: ld a0, %lo(g_16)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_g_16:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB5_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_16)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB5_1)
+; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* @g_16
ret i64 %0
@@ -138,11 +256,30 @@ define dso_local void @store_g_4() nounwind {
; RV32I-NEXT: sw zero, 4(a0)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: store_g_4:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB6_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB6_1)
+; RV32I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: store_g_4:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(g_4)
; RV64I-NEXT: sd zero, %lo(g_4)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: store_g_4:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB6_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB6_1)
+; RV64I-MEDIUM-NEXT: sd zero, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
store i64 0, i64* @g_4
ret void
@@ -156,11 +293,30 @@ define dso_local void @store_g_8() nounwind {
; RV32I-NEXT: sw zero, %lo(g_8)(a0)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: store_g_8:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB7_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_8)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB7_1)
+; RV32I-MEDIUM-NEXT: sw zero, 4(a0)
+; RV32I-MEDIUM-NEXT: sw zero, 0(a0)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: store_g_8:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(g_8)
; RV64I-NEXT: sd zero, %lo(g_8)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: store_g_8:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB7_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_8)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB7_1)
+; RV64I-MEDIUM-NEXT: sd zero, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
store i64 0, i64* @g_8
ret void
@@ -180,6 +336,17 @@ define dso_local void @inc_g_i32() nounwind {
; RV32I-NEXT: sw a1, %lo(g_4_i32)(a0)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: inc_g_i32:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB8_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4_i32)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB8_1)
+; RV32I-MEDIUM-NEXT: lw a1, 0(a0)
+; RV32I-MEDIUM-NEXT: addi a1, a1, 1
+; RV32I-MEDIUM-NEXT: sw a1, 0(a0)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: inc_g_i32:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(g_4_i32)
@@ -187,6 +354,17 @@ define dso_local void @inc_g_i32() nounwind {
; RV64I-NEXT: addiw a1, a1, 1
; RV64I-NEXT: sw a1, %lo(g_4_i32)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: inc_g_i32:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB8_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(g_4_i32)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB8_1)
+; RV64I-MEDIUM-NEXT: lw a1, 0(a0)
+; RV64I-MEDIUM-NEXT: addiw a1, a1, 1
+; RV64I-MEDIUM-NEXT: sw a1, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i32, i32* @g_4_i32
%inc = add i32 %0, 1
@@ -197,6 +375,42 @@ if.end:
ret void
}
+; Check for folds in accesses to elements of an i32 array.
+
+ at ga = dso_local local_unnamed_addr global [2 x i32] zeroinitializer, align 4
+
+define dso_local i32 @load_ga() local_unnamed_addr #0 {
+; RV32I-LABEL: load_ga:
+; RV32I: # %bb.0:
+; RV32I-NEXT: lui a0, %hi(ga+4)
+; RV32I-NEXT: lw a0, %lo(ga+4)(a0)
+; RV32I-NEXT: ret
+;
+; RV32I-MEDIUM-LABEL: load_ga:
+; RV32I-MEDIUM: # %bb.0:
+; RV32I-MEDIUM-NEXT: .LBB9_1: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga)
+; RV32I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB9_1)
+; RV32I-MEDIUM-NEXT: lw a0, 4(a0)
+; RV32I-MEDIUM-NEXT: ret
+;
+; RV64I-LABEL: load_ga:
+; RV64I: # %bb.0:
+; RV64I-NEXT: lui a0, %hi(ga+4)
+; RV64I-NEXT: lw a0, %lo(ga+4)(a0)
+; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_ga:
+; RV64I-MEDIUM: # %bb.0:
+; RV64I-MEDIUM-NEXT: .LBB9_1: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB9_1)
+; RV64I-MEDIUM-NEXT: lw a0, 4(a0)
+; RV64I-MEDIUM-NEXT: ret
+ %1 = load i32, i32* getelementptr inbounds ([2 x i32], [2 x i32]* @ga, i32 0, i32 1), align 4
+ ret i32 %1
+}
+
; Check for folds in accesses to the second element of an i64 array.
@ga_8 = dso_local local_unnamed_addr global [2 x i64] zeroinitializer, align 8
@@ -211,11 +425,30 @@ define dso_local i64 @load_ga_8() nounwind {
; RV32I-NEXT: lw a1, 12(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_ga_8:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB10_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(ga_8)
+; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB10_1)
+; RV32I-MEDIUM-NEXT: lw a0, 8(a1)
+; RV32I-MEDIUM-NEXT: lw a1, 12(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_ga_8:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(ga_8+8)
; RV64I-NEXT: ld a0, %lo(ga_8+8)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_ga_8:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB10_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga_8)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB10_1)
+; RV64I-MEDIUM-NEXT: ld a0, 8(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* getelementptr inbounds ([2 x i64], [2 x i64]* @ga_8, i32 0, i32 1)
ret i64 %0
@@ -229,11 +462,30 @@ define dso_local i64 @load_ga_16() nounwind {
; RV32I-NEXT: lw a1, %lo(ga_16+12)(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_ga_16:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: .LBB11_1: # %entry
+; RV32I-MEDIUM-NEXT: # Label of block must be emitted
+; RV32I-MEDIUM-NEXT: auipc a1, %pcrel_hi(ga_16)
+; RV32I-MEDIUM-NEXT: addi a1, a1, %pcrel_lo(.LBB11_1)
+; RV32I-MEDIUM-NEXT: lw a0, 8(a1)
+; RV32I-MEDIUM-NEXT: lw a1, 12(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_ga_16:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %hi(ga_16)
; RV64I-NEXT: ld a0, %lo(ga_16+8)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_ga_16:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: .LBB11_1: # %entry
+; RV64I-MEDIUM-NEXT: # Label of block must be emitted
+; RV64I-MEDIUM-NEXT: auipc a0, %pcrel_hi(ga_16)
+; RV64I-MEDIUM-NEXT: addi a0, a0, %pcrel_lo(.LBB11_1)
+; RV64I-MEDIUM-NEXT: ld a0, 8(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* getelementptr inbounds ([2 x i64], [2 x i64]* @ga_16, i32 0, i32 1)
ret i64 %0
@@ -254,12 +506,28 @@ define dso_local i64 @load_tl_4() nounwind {
; RV32I-NEXT: lw a1, 4(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_tl_4:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: lui a0, %tprel_hi(tl_4)
+; RV32I-MEDIUM-NEXT: add a1, a0, tp, %tprel_add(tl_4)
+; RV32I-MEDIUM-NEXT: lw a0, %tprel_lo(tl_4)(a1)
+; RV32I-MEDIUM-NEXT: addi a1, a1, %tprel_lo(tl_4)
+; RV32I-MEDIUM-NEXT: lw a1, 4(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_tl_4:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %tprel_hi(tl_4)
; RV64I-NEXT: add a0, a0, tp, %tprel_add(tl_4)
; RV64I-NEXT: ld a0, %tprel_lo(tl_4)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_tl_4:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: lui a0, %tprel_hi(tl_4)
+; RV64I-MEDIUM-NEXT: add a0, a0, tp, %tprel_add(tl_4)
+; RV64I-MEDIUM-NEXT: ld a0, %tprel_lo(tl_4)(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* @tl_4
ret i64 %0
@@ -274,12 +542,27 @@ define dso_local i64 @load_tl_8() nounwind {
; RV32I-NEXT: lw a1, %tprel_lo(tl_8+4)(a1)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_tl_8:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: lui a0, %tprel_hi(tl_8)
+; RV32I-MEDIUM-NEXT: add a1, a0, tp, %tprel_add(tl_8)
+; RV32I-MEDIUM-NEXT: lw a0, %tprel_lo(tl_8)(a1)
+; RV32I-MEDIUM-NEXT: lw a1, %tprel_lo(tl_8+4)(a1)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_tl_8:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, %tprel_hi(tl_8)
; RV64I-NEXT: add a0, a0, tp, %tprel_add(tl_8)
; RV64I-NEXT: ld a0, %tprel_lo(tl_8)(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_tl_8:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: lui a0, %tprel_hi(tl_8)
+; RV64I-MEDIUM-NEXT: add a0, a0, tp, %tprel_add(tl_8)
+; RV64I-MEDIUM-NEXT: ld a0, %tprel_lo(tl_8)(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* @tl_8
ret i64 %0
@@ -292,10 +575,21 @@ define dso_local i64 @load_const_ok() nounwind {
; RV32I-NEXT: lw a1, 2044(zero)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_const_ok:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: lw a0, 2040(zero)
+; RV32I-MEDIUM-NEXT: lw a1, 2044(zero)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_const_ok:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: ld a0, 2040(zero)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_const_ok:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: ld a0, 2040(zero)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* inttoptr (i32 2040 to i64*)
ret i64 %0
@@ -309,10 +603,22 @@ define dso_local i64 @load_cost_overflow() nounwind {
; RV32I-NEXT: lw a0, 2044(zero)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_cost_overflow:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: lui a0, 1
+; RV32I-MEDIUM-NEXT: lw a1, -2048(a0)
+; RV32I-MEDIUM-NEXT: lw a0, 2044(zero)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_cost_overflow:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: ld a0, 2044(zero)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_cost_overflow:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: ld a0, 2044(zero)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i64, i64* inttoptr (i64 2044 to i64*)
ret i64 %0
@@ -325,11 +631,23 @@ define dso_local i32 @load_const_medium() nounwind {
; RV32I-NEXT: lw a0, -16(a0)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_const_medium:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: lui a0, 1
+; RV32I-MEDIUM-NEXT: lw a0, -16(a0)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_const_medium:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, 1
; RV64I-NEXT: lw a0, -16(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_const_medium:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: lui a0, 1
+; RV64I-MEDIUM-NEXT: lw a0, -16(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i32, i32* inttoptr (i64 4080 to i32*)
ret i32 %0
@@ -345,12 +663,25 @@ define dso_local i32 @load_const_large() nounwind {
; RV32I-NEXT: lw a0, -2048(a0)
; RV32I-NEXT: ret
;
+; RV32I-MEDIUM-LABEL: load_const_large:
+; RV32I-MEDIUM: # %bb.0: # %entry
+; RV32I-MEDIUM-NEXT: lui a0, 524288
+; RV32I-MEDIUM-NEXT: lw a0, -2048(a0)
+; RV32I-MEDIUM-NEXT: ret
+;
; RV64I-LABEL: load_const_large:
; RV64I: # %bb.0: # %entry
; RV64I-NEXT: lui a0, 524288
; RV64I-NEXT: addiw a0, a0, -2048
; RV64I-NEXT: lw a0, 0(a0)
; RV64I-NEXT: ret
+;
+; RV64I-MEDIUM-LABEL: load_const_large:
+; RV64I-MEDIUM: # %bb.0: # %entry
+; RV64I-MEDIUM-NEXT: lui a0, 524288
+; RV64I-MEDIUM-NEXT: addiw a0, a0, -2048
+; RV64I-MEDIUM-NEXT: lw a0, 0(a0)
+; RV64I-MEDIUM-NEXT: ret
entry:
%0 = load i32, i32* inttoptr (i64 2147481600 to i32*)
ret i32 %0
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