[PATCH] D130680: [IntegerDivision][AMDGPU] Use CreateLogicalOr to block poison propagation.
Nikita Popov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 29 00:44:48 PDT 2022
nikic added inline comments.
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Comment at: llvm/lib/Transforms/Utils/IntegerDivision.cpp:260
Value *Ret0_2 = Builder.CreateICmpEQ(Dividend, Zero);
- Value *Ret0_3 = Builder.CreateOr(Ret0_1, Ret0_2);
+ Value *Ret0_3 = Builder.CreateLogicalOr(Ret0_1, Ret0_2);
Value *Tmp0 = Builder.CreateCall(CTLZ, {Divisor, True});
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I don't think we need this logical or, because both inputs are non-poison with the freeze.
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Comment at: llvm/lib/Transforms/Utils/IntegerDivision.cpp:265
Value *Ret0_4 = Builder.CreateICmpUGT(SR, MSB);
- Value *Ret0 = Builder.CreateOr(Ret0_3, Ret0_4);
+ Value *Ret0 = Builder.CreateLogicalOr(Ret0_3, Ret0_4);
Value *RetDividend = Builder.CreateICmpEQ(SR, MSB);
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We *do* need this one, because Ret0_4 may be poison (through SR).
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Comment at: llvm/lib/Transforms/Utils/IntegerDivision.cpp:268
Value *RetVal = Builder.CreateSelect(Ret0, Zero, Dividend);
- Value *EarlyRet = Builder.CreateOr(Ret0, RetDividend);
+ Value *EarlyRet = Builder.CreateLogicalOr(Ret0, RetDividend);
Builder.CreateCondBr(EarlyRet, End, BB1);
----------------
We also need this one, because RetDividend may be poison (through SR).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D130680/new/
https://reviews.llvm.org/D130680
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