[PATCH] D130740: [TTI][AArch64][SLP] Sets the cost of an ADD reduction 2xi64 to 2.

Vasileios Porpodas via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 28 17:59:20 PDT 2022


vporpo created this revision.
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2xi64 is the legalized type for wide reductions (like 16xi64) and setting the
cost to 2 makes `load-reduce` and `load-zext-reduce` patterns profitable.

The few performance measurments that I did on an aarch64 machine confirm that
these patterns are actually faster when vectorized.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D130740

Files:
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/AArch64/reduce-add.ll
  llvm/test/Transforms/SLPVectorizer/AArch64/reduce-add-i64.ll

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