[PATCH] D128642: [AArch64][SVE] Use SVE for VLS fcopysign for wide vectors

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:15405
+    if (N1Op0VT.isVector() && !EnableVectorFcopysignExtendRound)
       return false;
 
----------------
What about `return EnableVectorFcopysignExtendRound;`?


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Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp:3597
+
+  if (!isTypeLegal(N->getValueType(0)))
+    return DAG.UnrollVectorOp(N, N->getValueType(0).getVectorNumElements());
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By this point we know the result type is legal because results are legalised before operands.  What's important here is the result type remains legal after splitting the operands.  Given the result and first operands have the same type this means ensuring the types of `LHSLo` and `LHSHi` are legal after splitting.

There's a function `GetSplitDestVTs` which returns the types expected from splitting.  I mention this because I think it's better to query the expected types are legal before performing the actual splitting. 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D128642/new/

https://reviews.llvm.org/D128642